[gcc r9-8982] PR target/96313 AArch64: vqmovun* return types should be unsigned

[gcc r9-8982] PR target/96313 AArch64: vqmovun* return types should be unsigned

[Kyrylo Tkachov]

https://gcc.gnu.org/g:18d980d94f8d7187ce30bf23ddd365fa54189c36

commit r9-8982-g18d980d94f8d7187ce30bf23ddd365fa54189c36
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Wed Sep 30 12:00:20 2020 +0100

    PR target/96313 AArch64: vqmovun* return types should be unsigned
    
    In this PR we have the wrong return type for some intrinsics. It should
    be unsigned, but we implement it as signed.
    Fix this by adjusting the type qualifiers used when creating the
    builtins and fixing the type in the arm_neon.h intrinsic.
    With the adjustment in qualifiers we now don't need to cast the result
    when returning.
    
    Bootstrapped and tested on aarch64-none-linux-gnu.
    
    gcc/
            PR target/96313
            * config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS
            qualifiers.
            * config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call.
            Remove unnecessary result cast.
            (vqmovun_s32): Likewise.
            (vqmovun_s64): Likewise.
            (vqmovunh_s16): Likewise.  Fix return type.
            (vqmovuns_s32): Likewise.
            (vqmovund_s64): Likewise.
    
    gcc/testsuite/
            PR target/96313
            * gcc.target/aarch64/pr96313.c: New test.
            * gcc.target/aarch64/scalar_intrinsics.c (test_vqmovunh_s16):
            Adjust return type.
            (test_vqmovuns_s32): Likewise.
            (test_vqmovund_s64): Likewise.
    
    (cherry picked from commit 135b043196b5575c690ef1e07bcbb49bf037c3a2)
    (cherry picked from commit 7d177b142dcbe841124fe023cb592914d4200e57)

Diff:
---
 gcc/config/aarch64/aarch64-simd-builtins.def         |  2 +-
 gcc/config/aarch64/arm_neon.h                        | 18 +++++++++---------
 gcc/testsuite/gcc.target/aarch64/pr96313.c           |  8 ++++++++
 gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c |  6 +++---
 4 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 20af5ebb5c7..f114c05f63d 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -155,7 +155,7 @@
   BUILTIN_VQN (TERNOP, raddhn2, 0)
   BUILTIN_VQN (TERNOP, rsubhn2, 0)
 
-  BUILTIN_VSQN_HSDI (UNOP, sqmovun, 0)
+  BUILTIN_VSQN_HSDI (UNOPUS, sqmovun, 0)
   /* Implemented by aarch64_<sur>qmovn<mode>.  */
   BUILTIN_VSQN_HSDI (UNOP, sqmovn, 0)
   BUILTIN_VSQN_HSDI (UNOP, uqmovn, 0)
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 1fd8faae80f..7e88ca64b51 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -24177,42 +24177,42 @@ __extension__ extern __inline uint8x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovun_s16 (int16x8_t __a)
 {
-  return (uint8x8_t) __builtin_aarch64_sqmovunv8hi (__a);
+  return __builtin_aarch64_sqmovunv8hi_us (__a);
 }
 
 __extension__ extern __inline uint16x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovun_s32 (int32x4_t __a)
 {
-  return (uint16x4_t) __builtin_aarch64_sqmovunv4si (__a);
+  return __builtin_aarch64_sqmovunv4si_us (__a);
 }
 
 __extension__ extern __inline uint32x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovun_s64 (int64x2_t __a)
 {
-  return (uint32x2_t) __builtin_aarch64_sqmovunv2di (__a);
+  return __builtin_aarch64_sqmovunv2di_us (__a);
 }
 
-__extension__ extern __inline int8_t
+__extension__ extern __inline uint8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovunh_s16 (int16_t __a)
 {
-  return (int8_t) __builtin_aarch64_sqmovunhi (__a);
+  return __builtin_aarch64_sqmovunhi_us (__a);
 }
 
-__extension__ extern __inline int16_t
+__extension__ extern __inline uint16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovuns_s32 (int32_t __a)
 {
-  return (int16_t) __builtin_aarch64_sqmovunsi (__a);
+  return __builtin_aarch64_sqmovunsi_us (__a);
 }
 
-__extension__ extern __inline int32_t
+__extension__ extern __inline uint32_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vqmovund_s64 (int64_t __a)
 {
-  return (int32_t) __builtin_aarch64_sqmovundi (__a);
+  return __builtin_aarch64_sqmovundi_us (__a);
 }
 
 /* vqneg */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr96313.c b/gcc/testsuite/gcc.target/aarch64/pr96313.c
new file mode 100644
index 00000000000..0bf7604092f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr96313.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+
+#include <arm_neon.h>
+
+uint32_t (*fp3)(int64_t) = vqmovund_s64;
+uint8_t (*fp4)(int16_t) = vqmovunh_s16;
+uint16_t (*fp5)(int32_t) = vqmovuns_s32;
+
diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
index d943989768d..c2e13b651e9 100644
--- a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
+++ b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
@@ -661,7 +661,7 @@ test_vqnegs_s32 (int32_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */
 
-int8_t
+uint8_t
 test_vqmovunh_s16 (int16_t a)
 {
   return vqmovunh_s16 (a);
@@ -669,7 +669,7 @@ test_vqmovunh_s16 (int16_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */
 
-int16_t
+uint16_t
 test_vqmovuns_s32 (int32_t a)
 {
   return vqmovuns_s32 (a);
@@ -677,7 +677,7 @@ test_vqmovuns_s32 (int32_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */
 
-int32_t
+uint32_t
 test_vqmovund_s64 (int64_t a)
 {
   return vqmovund_s64 (a);