public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
From: William Schmidt <wschmidt@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/wschmidt/heads/builtins3)] rs6000: Start cleaning up some discrepancies
Date: Thu, 29 Oct 2020 19:52:57 +0000 (GMT)	[thread overview]
Message-ID: <20201029195257.D22483987499@sourceware.org> (raw)

https://gcc.gnu.org/g:635f15e20d76fd732c9c70cf779ad52bb64d1b81

commit 635f15e20d76fd732c9c70cf779ad52bb64d1b81
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date:   Fri Aug 28 16:11:33 2020 -0500

    rs6000: Start cleaning up some discrepancies
    
    2020-08-28  Bill Schmidt  <wschmidt@linux.ibm.com>
    
    gcc/
            * config/rs6000/rs6000-builtin-new.def
            (__builtin_altivec_mask_for_store): Remove.
            (__builtin_altivec_xst_len_r): Rename to __builtin_vec_xst_len_r.
            (__builtin_vsx_scalar_cmp_exp_qp_eq): Fix typo in name.
            (__builtin_altivec_vextduwvhx): Likewise.
            * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
            * config/rs6000/rs6000-call.c (rs6000_expand_ldst_mask): Remove
            all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
            (rs6000_expand_builtin): Likewise.
            (altivec_init_builtins): Add debug code for
            __builtin_altivec_mask_for_load.

Diff:
---
 gcc/config/rs6000/rs6000-builtin-new.def | 11 ++++------
 gcc/config/rs6000/rs6000-call.c          | 35 +++++++++++++-------------------
 2 files changed, 18 insertions(+), 28 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index ddf4a4605a4..c0f8821be64 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -356,9 +356,6 @@
   vuc __builtin_altivec_mask_for_load (long long, void *);
     MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
 
-  vuc __builtin_altivec_mask_for_store (long long, void *);
-    MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
-
   vus __builtin_altivec_mfvscr ();
     MFVSCR altivec_mfvscr {}
 
@@ -2723,10 +2720,10 @@
 ; 32 bits, and the return value is DImode, so it seems that
 ; TARGET_64BIT (actually TARGET_POWERPC64) is justified.  TBD. ####
 [power9-64]
-; The following two are inexplicably named __builtin_altivec_* while
+; The following two are inexplicably named __builtin_{alti,}vec_* while
 ; their load counterparts are __builtin_vsx_*.  Need to deprecate
 ; these interfaces in favor of the other naming scheme (or vice versa).
-  void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+  void __builtin_vec_xst_len_r (vop, void *, unsigned long long);
     XST_LEN_R xst_len_r {}
 
   void __builtin_altivec_stxvl (vop, void *, unsigned long long);
@@ -2774,7 +2771,7 @@
   const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
     VSESQP xsxsigqp_kf {}
 
-  const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
     VSCEQPEQ xscmpexpqp_eq_kf {}
 
   const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
@@ -3042,7 +3039,7 @@
   const vull __builtin_altivec_vextduhvlx (vus, vus, unsigned char);
     VEXTRACTHL vextractlv8hi {}
 
-  const vull __builtin_altivec_vextduwvrx (vui, vui, unsigned char);
+  const vull __builtin_altivec_vextduwvhx (vui, vui, unsigned char);
     VEXTRACTWR vextractrv4si {}
 
   const vull __builtin_altivec_vextduwvlx (vui, vui, unsigned char);
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 0a7286b560b..afc5147a1b6 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -13366,7 +13366,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
   return false;
 }
 
-/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD/STORE.  */
+/* Expand ALTIVEC_BUILTIN_MASK_FOR_LOAD.  */
 rtx
 rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
 {
@@ -13381,16 +13381,10 @@ rs6000_expand_ldst_mask (rtx target, rs6000_builtins fcode, tree arg0)
   gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg0)));
   op = expand_expr (arg0, NULL_RTX, Pmode, EXPAND_NORMAL);
   addr = memory_address (mode, op);
-  if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
-    op = addr;
-  else
-    {
-      gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
-      /* For the load case need to negate the address.  */
-      op = gen_reg_rtx (GET_MODE (addr));
-      emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
-					       addr)));
-    }
+  gcc_assert (fcode == ALTIVEC_BUILTIN_MASK_FOR_LOAD);
+  /* We need to negate the address.  */
+  op = gen_reg_rtx (GET_MODE (addr));
+  emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
   op = gen_rtx_MEM (mode, op);
 
   if (target == 0
@@ -13859,7 +13853,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 	  }
 
 	case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
-	case ALTIVEC_BUILTIN_MASK_FOR_STORE:
 	  {
 	    int icode2 = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
 			  : (int) CODE_FOR_altivec_lvsl_direct);
@@ -13874,15 +13867,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 	    gcc_assert (POINTER_TYPE_P (TREE_TYPE (arg)));
 	    op = expand_expr (arg, NULL_RTX, Pmode, EXPAND_NORMAL);
 	    addr = memory_address (mode, op);
-	    if (fcode == ALTIVEC_BUILTIN_MASK_FOR_STORE)
-	      op = addr;
-	    else
-	      {
-		/* For the load case need to negate the address.  */
-		op = gen_reg_rtx (GET_MODE (addr));
-		emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr),
-							 addr)));
-	      }
+	    /* We need to negate the address.  */
+	    op = gen_reg_rtx (GET_MODE (addr));
+	    emit_insn (gen_rtx_SET (op, gen_rtx_NEG (GET_MODE (addr), addr)));
 	    op = gen_rtx_MEM (mode, op);
 
 	    if (target == 0
@@ -14918,6 +14905,12 @@ altivec_init_builtins (void)
 			       ALTIVEC_BUILTIN_MASK_FOR_LOAD,
 			       BUILT_IN_MD, NULL, NULL_TREE);
   TREE_READONLY (decl) = 1;
+  if (TARGET_DEBUG_BUILTIN)
+    fprintf (stderr, "%s __builtin_altivec_mask_for_load (%s); [%4d]\n",
+	     rs6000_debug_type (TREE_TYPE (v16qi_ftype_pcvoid)),
+	     rs6000_debug_type (TREE_VALUE
+				(TYPE_ARG_TYPES (v16qi_ftype_pcvoid))),
+	     (int) ALTIVEC_BUILTIN_MASK_FOR_LOAD);
   /* Record the decl. Will be used by rs6000_builtin_mask_for_load.  */
   altivec_builtin_mask_for_load = decl;


             reply	other threads:[~2020-10-29 19:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-29 19:52 William Schmidt [this message]
  -- strict thread matches above, loose matches on Subject: below --
2020-10-27 16:30 William Schmidt
2020-09-16 21:31 William Schmidt
2020-09-14 14:00 William Schmidt
2020-08-28 21:11 William Schmidt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201029195257.D22483987499@sourceware.org \
    --to=wschmidt@gcc.gnu.org \
    --cc=gcc-cvs@gcc.gnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).