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* [gcc r11-4668] Fix PR97205
@ 2020-11-03 14:08 Bernd Edlinger
0 siblings, 0 replies; only message in thread
From: Bernd Edlinger @ 2020-11-03 14:08 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:23ac7a009ecfeec3eab79136abed8aac9768b458
commit r11-4668-g23ac7a009ecfeec3eab79136abed8aac9768b458
Author: Bernd Edlinger <bernd.edlinger@hotmail.de>
Date: Sun Nov 1 07:32:20 2020 +0100
Fix PR97205
This makes sure that stack allocated SSA_NAMEs are
at least MODE_ALIGNED. Also increase the MEM_ALIGN
for the corresponding rtl objects.
gcc:
2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/97205
* cfgexpand.c (align_local_variable): Make SSA_NAMEs
at least MODE_ALIGNED.
(expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs.
gcc/testsuite:
2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/97205
* gcc.c-torture/compile/pr97205.c: New test.
Diff:
---
gcc/ChangeLog | 7 +++++
gcc/cfgexpand.c | 43 ++++++++++++++++-----------
gcc/testsuite/ChangeLog | 5 ++++
gcc/testsuite/gcc.c-torture/compile/pr97205.c | 7 +++++
4 files changed, 45 insertions(+), 17 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2ff5c4e76d1..5de466df347 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/97205
+ * cfgexpand.c (align_local_variable): Make SSA_NAMEs
+ at least MODE_ALIGNED.
+ (expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs.
+
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def(vbfcvt): New entry.
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index f3f17d38f9e..6c41a7e21a7 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -366,7 +366,15 @@ align_local_variable (tree decl, bool really_expand)
unsigned int align;
if (TREE_CODE (decl) == SSA_NAME)
- align = TYPE_ALIGN (TREE_TYPE (decl));
+ {
+ tree type = TREE_TYPE (decl);
+ machine_mode mode = TYPE_MODE (type);
+
+ align = TYPE_ALIGN (type);
+ if (mode != BLKmode
+ && align < GET_MODE_ALIGNMENT (mode))
+ align = GET_MODE_ALIGNMENT (mode);
+ }
else
{
align = LOCAL_DECL_ALIGNMENT (decl);
@@ -999,20 +1007,21 @@ expand_one_stack_var_at (tree decl, rtx base, unsigned base_align,
x = plus_constant (Pmode, base, offset);
x = gen_rtx_MEM (TREE_CODE (decl) == SSA_NAME
? TYPE_MODE (TREE_TYPE (decl))
- : DECL_MODE (SSAVAR (decl)), x);
+ : DECL_MODE (decl), x);
+
+ /* Set alignment we actually gave this decl if it isn't an SSA name.
+ If it is we generate stack slots only accidentally so it isn't as
+ important, we'll simply set the alignment directly on the MEM. */
+
+ if (base == virtual_stack_vars_rtx)
+ offset -= frame_phase;
+ align = known_alignment (offset);
+ align *= BITS_PER_UNIT;
+ if (align == 0 || align > base_align)
+ align = base_align;
if (TREE_CODE (decl) != SSA_NAME)
{
- /* Set alignment we actually gave this decl if it isn't an SSA name.
- If it is we generate stack slots only accidentally so it isn't as
- important, we'll simply use the alignment that is already set. */
- if (base == virtual_stack_vars_rtx)
- offset -= frame_phase;
- align = known_alignment (offset);
- align *= BITS_PER_UNIT;
- if (align == 0 || align > base_align)
- align = base_align;
-
/* One would think that we could assert that we're not decreasing
alignment here, but (at least) the i386 port does exactly this
via the MINIMUM_ALIGNMENT hook. */
@@ -1022,6 +1031,8 @@ expand_one_stack_var_at (tree decl, rtx base, unsigned base_align,
}
set_rtl (decl, x);
+
+ set_mem_align (x, align);
}
class stack_vars_data
@@ -1327,13 +1338,11 @@ expand_one_stack_var_1 (tree var)
{
tree type = TREE_TYPE (var);
size = tree_to_poly_uint64 (TYPE_SIZE_UNIT (type));
- byte_align = TYPE_ALIGN_UNIT (type);
}
else
- {
- size = tree_to_poly_uint64 (DECL_SIZE_UNIT (var));
- byte_align = align_local_variable (var, true);
- }
+ size = tree_to_poly_uint64 (DECL_SIZE_UNIT (var));
+
+ byte_align = align_local_variable (var, true);
/* We handle highly aligned variables in expand_stack_vars. */
gcc_assert (byte_align * BITS_PER_UNIT <= MAX_SUPPORTED_STACK_ALIGNMENT);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a7bbb1bd181..d4814947cab 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
+
+ PR target/97205
+ * gcc.c-torture/compile/pr97205.c: New test.
+
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr97205.c b/gcc/testsuite/gcc.c-torture/compile/pr97205.c
new file mode 100644
index 00000000000..6600011fcf8
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr97205.c
@@ -0,0 +1,7 @@
+int a;
+typedef __attribute__((aligned(2))) int x;
+int f ()
+{
+ x b = a;
+ return b;
+}
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