[gcc(refs/vendors/ibm/heads/int128)] Power10: Add int128 divide, modulus.

[gcc(refs/vendors/ibm/heads/int128)] Power10: Add int128 divide, modulus.

[Michael Meissner]

https://gcc.gnu.org/g:12a7b292099e8a1f18ae5286ccd32e26ec716f93

commit 12a7b292099e8a1f18ae5286ccd32e26ec716f93
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 5 00:56:41 2020 -0500

    Power10: Add int128 divide, modulus.
    
    gcc/
    2020-11-05  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/rs6000.c (divti3): New insn.
            (udivti3): New insn.
            (modti3): New insn.
            (umodti3): New insn.

Diff:
---
 gcc/config/rs6000/rs6000.md | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 566ec9b9cac..f24d400653b 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3395,6 +3395,38 @@
 	(minus:GPR (match_dup 1)
 		   (match_dup 3)))])
 
+(define_insn "divti3"
+  [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
+	(div:TI (match_operand:TI 1 "gpc_reg_operand" "v")
+		(match_operand:TI 2 "gpc_reg_operand" "v")))]
+  "TARGET_POWER10"
+  "vdivsq %0,%1,%2"
+  [(set_attr "type" "vecdiv")])
+
+(define_insn "udivti3"
+  [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
+	(udiv:TI (match_operand:TI 1 "gpc_reg_operand" "v")
+		 (match_operand:TI 2 "gpc_reg_operand" "v")))]
+  "TARGET_POWER10"
+  "vdivuq %0,%1,%2"
+  [(set_attr "type" "vecdiv")])
+
+(define_insn "modti3"
+  [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
+	(mod:TI (match_operand:TI 1 "gpc_reg_operand" "v")
+		(match_operand:TI 2 "gpc_reg_operand" "v")))]
+  "TARGET_POWER10"
+  "vmodsq %0,%1,%2"
+  [(set_attr "type" "vecdiv")])
+
+(define_insn "umodti3"
+  [(set (match_operand:TI 0 "gpc_reg_operand" "=v")
+	(umod:TI (match_operand:TI 1 "gpc_reg_operand" "v")
+		 (match_operand:TI 2 "gpc_reg_operand" "v")))]
+  "TARGET_POWER10"
+  "vmoduq %0,%1,%2"
+  [(set_attr "type" "vecdiv")])
+
 \f
 ;; Logical instructions
 ;; The logical instructions are mostly combined by using match_operator,