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* [gcc(refs/users/wschmidt/heads/builtins4)] rs6000: MMA helper function for new builtin expansion support
@ 2020-11-24 16:44 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-11-24 16:44 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f4703b7e7f4d20a5fb987b1d2f7ae068547d4baf
commit f4703b7e7f4d20a5fb987b1d2f7ae068547d4baf
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Nov 2 10:44:00 2020 -0500
rs6000: MMA helper function for new builtin expansion support
Note: Squash into previous patch.
2020-11-02 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-call.c (new_mma_expand_builtin): New.
Diff:
---
gcc/config/rs6000/rs6000-call.c | 104 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 2a6cbe3cc7f..bd1ddbfd1b2 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10456,6 +10456,110 @@ mma_expand_builtin (tree exp, rtx target, bool *expandedp)
return target;
}
+/* Expand the MMA built-in in EXP. */
+static rtx
+new_mma_expand_builtin (tree exp, rtx target, rs6000_builtins fcode,
+ insn_code icode)
+{
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ tree arg;
+ call_expr_arg_iterator iter;
+ const struct insn_operand_data *insn_op;
+ rtx op[MAX_MMA_OPERANDS];
+ unsigned nopnds = 0;
+ /* ### This attr/void_func business needs replacing. */
+ unsigned attr = rs6000_builtin_info[fcode].attr;
+ bool void_func = (attr & RS6000_BTC_VOID);
+ machine_mode tmode = VOIDmode;
+
+ if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node)
+ {
+ tmode = insn_data[icode].operand[0].mode;
+ if (!target
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ op[nopnds++] = target;
+ }
+ else
+ target = const0_rtx;
+
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
+ if (arg == error_mark_node)
+ return const0_rtx;
+
+ rtx opnd;
+ insn_op = &insn_data[icode].operand[nopnds];
+ if (TREE_CODE (arg) == ADDR_EXPR
+ && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0))))
+ opnd = DECL_RTL (TREE_OPERAND (arg, 0));
+ else
+ opnd = expand_normal (arg);
+
+ if (!(*insn_op->predicate) (opnd, insn_op->mode))
+ {
+ if (!strcmp (insn_op->constraint, "n"))
+ {
+ if (!CONST_INT_P (opnd))
+ error ("argument %d must be an unsigned literal", nopnds);
+ else
+ error ("argument %d is an unsigned literal that is "
+ "out of range", nopnds);
+ return const0_rtx;
+ }
+ opnd = copy_to_mode_reg (insn_op->mode, opnd);
+ }
+
+ /* Some MMA instructions have INOUT accumulator operands, so force
+ their target register to be the same as their input register. */
+ /* ### The void_func test needs to happen some other way,
+ probably with TREE_TYPE (TREE_TYPE (fndecl)) as earlier. */
+ if (!void_func
+ && nopnds == 1
+ && !strcmp (insn_op->constraint, "0")
+ && insn_op->mode == tmode
+ && REG_P (opnd)
+ && (*insn_data[icode].operand[0].predicate) (opnd, tmode))
+ target = op[0] = opnd;
+
+ op[nopnds++] = opnd;
+ }
+
+ rtx pat;
+ switch (nopnds)
+ {
+ case 1:
+ pat = GEN_FCN (icode) (op[0]);
+ break;
+ case 2:
+ pat = GEN_FCN (icode) (op[0], op[1]);
+ break;
+ case 3:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);
+ break;
+ case 4:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
+ break;
+ case 5:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]);
+ break;
+ case 6:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]);
+ break;
+ case 7:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
+ break;
+ default:
+ gcc_unreachable ();
+ }
+ if (!pat)
+ return NULL_RTX;
+ emit_insn (pat);
+
+ return target;
+}
+
static rtx
stv_expand_builtin (insn_code icode, rtx *op,
machine_mode tmode, machine_mode smode)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins4)] rs6000: MMA helper function for new builtin expansion support
@ 2021-02-07 18:14 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2021-02-07 18:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:152e3c1f6b2160d2cc9ff1ba4c239b3c16dd3b87
commit 152e3c1f6b2160d2cc9ff1ba4c239b3c16dd3b87
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Nov 2 10:44:00 2020 -0500
rs6000: MMA helper function for new builtin expansion support
Note: Squash into previous patch.
2020-11-02 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-call.c (new_mma_expand_builtin): New.
Diff:
---
gcc/config/rs6000/rs6000-call.c | 104 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index afe233f00f6..049f6ead7bf 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10503,6 +10503,110 @@ mma_expand_builtin (tree exp, rtx target, bool *expandedp)
return target;
}
+/* Expand the MMA built-in in EXP. */
+static rtx
+new_mma_expand_builtin (tree exp, rtx target, rs6000_builtins fcode,
+ insn_code icode)
+{
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ tree arg;
+ call_expr_arg_iterator iter;
+ const struct insn_operand_data *insn_op;
+ rtx op[MAX_MMA_OPERANDS];
+ unsigned nopnds = 0;
+ /* ### This attr/void_func business needs replacing. */
+ unsigned attr = rs6000_builtin_info[fcode].attr;
+ bool void_func = (attr & RS6000_BTC_VOID);
+ machine_mode tmode = VOIDmode;
+
+ if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node)
+ {
+ tmode = insn_data[icode].operand[0].mode;
+ if (!target
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ op[nopnds++] = target;
+ }
+ else
+ target = const0_rtx;
+
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
+ if (arg == error_mark_node)
+ return const0_rtx;
+
+ rtx opnd;
+ insn_op = &insn_data[icode].operand[nopnds];
+ if (TREE_CODE (arg) == ADDR_EXPR
+ && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0))))
+ opnd = DECL_RTL (TREE_OPERAND (arg, 0));
+ else
+ opnd = expand_normal (arg);
+
+ if (!(*insn_op->predicate) (opnd, insn_op->mode))
+ {
+ if (!strcmp (insn_op->constraint, "n"))
+ {
+ if (!CONST_INT_P (opnd))
+ error ("argument %d must be an unsigned literal", nopnds);
+ else
+ error ("argument %d is an unsigned literal that is "
+ "out of range", nopnds);
+ return const0_rtx;
+ }
+ opnd = copy_to_mode_reg (insn_op->mode, opnd);
+ }
+
+ /* Some MMA instructions have INOUT accumulator operands, so force
+ their target register to be the same as their input register. */
+ /* ### The void_func test needs to happen some other way,
+ probably with TREE_TYPE (TREE_TYPE (fndecl)) as earlier. */
+ if (!void_func
+ && nopnds == 1
+ && !strcmp (insn_op->constraint, "0")
+ && insn_op->mode == tmode
+ && REG_P (opnd)
+ && (*insn_data[icode].operand[0].predicate) (opnd, tmode))
+ target = op[0] = opnd;
+
+ op[nopnds++] = opnd;
+ }
+
+ rtx pat;
+ switch (nopnds)
+ {
+ case 1:
+ pat = GEN_FCN (icode) (op[0]);
+ break;
+ case 2:
+ pat = GEN_FCN (icode) (op[0], op[1]);
+ break;
+ case 3:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);
+ break;
+ case 4:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
+ break;
+ case 5:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]);
+ break;
+ case 6:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]);
+ break;
+ case 7:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
+ break;
+ default:
+ gcc_unreachable ();
+ }
+ if (!pat)
+ return NULL_RTX;
+ emit_insn (pat);
+
+ return target;
+}
+
static rtx
stv_expand_builtin (insn_code icode, rtx *op,
machine_mode tmode, machine_mode smode)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins4)] rs6000: MMA helper function for new builtin expansion support
@ 2020-12-16 18:07 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-12-16 18:07 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f6d887f47f4e1eca9d7d7e3eda130930c83c7847
commit f6d887f47f4e1eca9d7d7e3eda130930c83c7847
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Nov 2 10:44:00 2020 -0500
rs6000: MMA helper function for new builtin expansion support
Note: Squash into previous patch.
2020-11-02 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-call.c (new_mma_expand_builtin): New.
Diff:
---
gcc/config/rs6000/rs6000-call.c | 104 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 0a8bd1867b0..cb2d6a05470 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10456,6 +10456,110 @@ mma_expand_builtin (tree exp, rtx target, bool *expandedp)
return target;
}
+/* Expand the MMA built-in in EXP. */
+static rtx
+new_mma_expand_builtin (tree exp, rtx target, rs6000_builtins fcode,
+ insn_code icode)
+{
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ tree arg;
+ call_expr_arg_iterator iter;
+ const struct insn_operand_data *insn_op;
+ rtx op[MAX_MMA_OPERANDS];
+ unsigned nopnds = 0;
+ /* ### This attr/void_func business needs replacing. */
+ unsigned attr = rs6000_builtin_info[fcode].attr;
+ bool void_func = (attr & RS6000_BTC_VOID);
+ machine_mode tmode = VOIDmode;
+
+ if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node)
+ {
+ tmode = insn_data[icode].operand[0].mode;
+ if (!target
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ op[nopnds++] = target;
+ }
+ else
+ target = const0_rtx;
+
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
+ if (arg == error_mark_node)
+ return const0_rtx;
+
+ rtx opnd;
+ insn_op = &insn_data[icode].operand[nopnds];
+ if (TREE_CODE (arg) == ADDR_EXPR
+ && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0))))
+ opnd = DECL_RTL (TREE_OPERAND (arg, 0));
+ else
+ opnd = expand_normal (arg);
+
+ if (!(*insn_op->predicate) (opnd, insn_op->mode))
+ {
+ if (!strcmp (insn_op->constraint, "n"))
+ {
+ if (!CONST_INT_P (opnd))
+ error ("argument %d must be an unsigned literal", nopnds);
+ else
+ error ("argument %d is an unsigned literal that is "
+ "out of range", nopnds);
+ return const0_rtx;
+ }
+ opnd = copy_to_mode_reg (insn_op->mode, opnd);
+ }
+
+ /* Some MMA instructions have INOUT accumulator operands, so force
+ their target register to be the same as their input register. */
+ /* ### The void_func test needs to happen some other way,
+ probably with TREE_TYPE (TREE_TYPE (fndecl)) as earlier. */
+ if (!void_func
+ && nopnds == 1
+ && !strcmp (insn_op->constraint, "0")
+ && insn_op->mode == tmode
+ && REG_P (opnd)
+ && (*insn_data[icode].operand[0].predicate) (opnd, tmode))
+ target = op[0] = opnd;
+
+ op[nopnds++] = opnd;
+ }
+
+ rtx pat;
+ switch (nopnds)
+ {
+ case 1:
+ pat = GEN_FCN (icode) (op[0]);
+ break;
+ case 2:
+ pat = GEN_FCN (icode) (op[0], op[1]);
+ break;
+ case 3:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);
+ break;
+ case 4:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
+ break;
+ case 5:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]);
+ break;
+ case 6:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]);
+ break;
+ case 7:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
+ break;
+ default:
+ gcc_unreachable ();
+ }
+ if (!pat)
+ return NULL_RTX;
+ emit_insn (pat);
+
+ return target;
+}
+
static rtx
stv_expand_builtin (insn_code icode, rtx *op,
machine_mode tmode, machine_mode smode)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins4)] rs6000: MMA helper function for new builtin expansion support
@ 2020-11-02 22:08 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-11-02 22:08 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d259720e95832223e261be012918a29984fe85f1
commit d259720e95832223e261be012918a29984fe85f1
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Nov 2 10:44:00 2020 -0500
rs6000: MMA helper function for new builtin expansion support
Note: Squash into previous patch.
2020-11-02 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-call.c (new_mma_expand_builtin): New.
Diff:
---
gcc/config/rs6000/rs6000-call.c | 104 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 67c9633de44..4080ffb4681 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10385,6 +10385,110 @@ mma_expand_builtin (tree exp, rtx target, bool *expandedp)
return target;
}
+/* Expand the MMA built-in in EXP. */
+static rtx
+new_mma_expand_builtin (tree exp, rtx target, rs6000_builtins fcode,
+ insn_code icode)
+{
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ tree arg;
+ call_expr_arg_iterator iter;
+ const struct insn_operand_data *insn_op;
+ rtx op[MAX_MMA_OPERANDS];
+ unsigned nopnds = 0;
+ /* ### This attr/void_func business needs replacing. */
+ unsigned attr = rs6000_builtin_info[fcode].attr;
+ bool void_func = (attr & RS6000_BTC_VOID);
+ machine_mode tmode = VOIDmode;
+
+ if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node)
+ {
+ tmode = insn_data[icode].operand[0].mode;
+ if (!target
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ op[nopnds++] = target;
+ }
+ else
+ target = const0_rtx;
+
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
+ if (arg == error_mark_node)
+ return const0_rtx;
+
+ rtx opnd;
+ insn_op = &insn_data[icode].operand[nopnds];
+ if (TREE_CODE (arg) == ADDR_EXPR
+ && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0))))
+ opnd = DECL_RTL (TREE_OPERAND (arg, 0));
+ else
+ opnd = expand_normal (arg);
+
+ if (!(*insn_op->predicate) (opnd, insn_op->mode))
+ {
+ if (!strcmp (insn_op->constraint, "n"))
+ {
+ if (!CONST_INT_P (opnd))
+ error ("argument %d must be an unsigned literal", nopnds);
+ else
+ error ("argument %d is an unsigned literal that is "
+ "out of range", nopnds);
+ return const0_rtx;
+ }
+ opnd = copy_to_mode_reg (insn_op->mode, opnd);
+ }
+
+ /* Some MMA instructions have INOUT accumulator operands, so force
+ their target register to be the same as their input register. */
+ /* ### The void_func test needs to happen some other way,
+ probably with TREE_TYPE (TREE_TYPE (fndecl)) as earlier. */
+ if (!void_func
+ && nopnds == 1
+ && !strcmp (insn_op->constraint, "0")
+ && insn_op->mode == tmode
+ && REG_P (opnd)
+ && (*insn_data[icode].operand[0].predicate) (opnd, tmode))
+ target = op[0] = opnd;
+
+ op[nopnds++] = opnd;
+ }
+
+ rtx pat;
+ switch (nopnds)
+ {
+ case 1:
+ pat = GEN_FCN (icode) (op[0]);
+ break;
+ case 2:
+ pat = GEN_FCN (icode) (op[0], op[1]);
+ break;
+ case 3:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);
+ break;
+ case 4:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
+ break;
+ case 5:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]);
+ break;
+ case 6:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]);
+ break;
+ case 7:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
+ break;
+ default:
+ gcc_unreachable ();
+ }
+ if (!pat)
+ return NULL_RTX;
+ emit_insn (pat);
+
+ return target;
+}
+
static rtx
stv_expand_builtin (insn_code icode, rtx *op,
machine_mode tmode, machine_mode smode)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins4)] rs6000: MMA helper function for new builtin expansion support
@ 2020-11-02 15:44 William Schmidt
0 siblings, 0 replies; 5+ messages in thread
From: William Schmidt @ 2020-11-02 15:44 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:4e67dbea6aaf994a5157851effb40358c347feef
commit 4e67dbea6aaf994a5157851effb40358c347feef
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Nov 2 10:44:00 2020 -0500
rs6000: MMA helper function for new builtin expansion support
Note: Squash into previous patch.
2020-11-02 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-call.c (new_mma_expand_builtin): New.
Diff:
---
gcc/config/rs6000/rs6000-call.c | 104 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index ff614e6157b..6ee1e7833aa 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10257,6 +10257,110 @@ mma_expand_builtin (tree exp, rtx target, bool *expandedp)
return target;
}
+/* Expand the MMA built-in in EXP. */
+static rtx
+new_mma_expand_builtin (tree exp, rtx target, rs6000_builtins fcode,
+ insn_code icode)
+{
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ tree arg;
+ call_expr_arg_iterator iter;
+ const struct insn_operand_data *insn_op;
+ rtx op[MAX_MMA_OPERANDS];
+ unsigned nopnds = 0;
+ /* ### This attr/void_func business needs replacing. */
+ unsigned attr = rs6000_builtin_info[fcode].attr;
+ bool void_func = (attr & RS6000_BTC_VOID);
+ machine_mode tmode = VOIDmode;
+
+ if (TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node)
+ {
+ tmode = insn_data[icode].operand[0].mode;
+ if (!target
+ || GET_MODE (target) != tmode
+ || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+ target = gen_reg_rtx (tmode);
+ op[nopnds++] = target;
+ }
+ else
+ target = const0_rtx;
+
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
+ if (arg == error_mark_node)
+ return const0_rtx;
+
+ rtx opnd;
+ insn_op = &insn_data[icode].operand[nopnds];
+ if (TREE_CODE (arg) == ADDR_EXPR
+ && MEM_P (DECL_RTL (TREE_OPERAND (arg, 0))))
+ opnd = DECL_RTL (TREE_OPERAND (arg, 0));
+ else
+ opnd = expand_normal (arg);
+
+ if (!(*insn_op->predicate) (opnd, insn_op->mode))
+ {
+ if (!strcmp (insn_op->constraint, "n"))
+ {
+ if (!CONST_INT_P (opnd))
+ error ("argument %d must be an unsigned literal", nopnds);
+ else
+ error ("argument %d is an unsigned literal that is "
+ "out of range", nopnds);
+ return const0_rtx;
+ }
+ opnd = copy_to_mode_reg (insn_op->mode, opnd);
+ }
+
+ /* Some MMA instructions have INOUT accumulator operands, so force
+ their target register to be the same as their input register. */
+ /* ### The void_func test needs to happen some other way,
+ probably with TREE_TYPE (TREE_TYPE (fndecl)) as earlier. */
+ if (!void_func
+ && nopnds == 1
+ && !strcmp (insn_op->constraint, "0")
+ && insn_op->mode == tmode
+ && REG_P (opnd)
+ && (*insn_data[icode].operand[0].predicate) (opnd, tmode))
+ target = op[0] = opnd;
+
+ op[nopnds++] = opnd;
+ }
+
+ rtx pat;
+ switch (nopnds)
+ {
+ case 1:
+ pat = GEN_FCN (icode) (op[0]);
+ break;
+ case 2:
+ pat = GEN_FCN (icode) (op[0], op[1]);
+ break;
+ case 3:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2]);
+ break;
+ case 4:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
+ break;
+ case 5:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]);
+ break;
+ case 6:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5]);
+ break;
+ case 7:
+ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
+ break;
+ default:
+ gcc_unreachable ();
+ }
+ if (!pat)
+ return NULL_RTX;
+ emit_insn (pat);
+
+ return target;
+}
+
static rtx
stv_expand_builtin (insn_code icode, rtx *op,
machine_mode tmode, machine_mode smode)
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-02-07 18:14 UTC | newest]
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