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* [gcc r11-5797] PR target/95294: VAX: Add test cases for MODE_CC representation
@ 2020-12-05 18:30 Maciej W. Rozycki
0 siblings, 0 replies; only message in thread
From: Maciej W. Rozycki @ 2020-12-05 18:30 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:4f47fca1d0fc2c6efef791d6dd115abd9d221733
commit r11-5797-g4f47fca1d0fc2c6efef791d6dd115abd9d221733
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date: Sat Dec 5 18:26:27 2020 +0000
PR target/95294: VAX: Add test cases for MODE_CC representation
gcc/testsuite/
PR target/95294
* gcc.target/vax/cmpelim-eq-adddf.c: New test.
* gcc.target/vax/cmpelim-eq-addhi.c: New test.
* gcc.target/vax/cmpelim-eq-addqi.c: New test.
* gcc.target/vax/cmpelim-eq-addsf.c: New test.
* gcc.target/vax/cmpelim-eq-addsi.c: New test.
* gcc.target/vax/cmpelim-eq-andhi.c: New test.
* gcc.target/vax/cmpelim-eq-andqi.c: New test.
* gcc.target/vax/cmpelim-eq-andsi.c: New test.
* gcc.target/vax/cmpelim-eq-ashlsi.c: New test.
* gcc.target/vax/cmpelim-eq-ashrsi.c: New test.
* gcc.target/vax/cmpelim-eq-divdf.c: New test.
* gcc.target/vax/cmpelim-eq-divhi.c: New test.
* gcc.target/vax/cmpelim-eq-divqi.c: New test.
* gcc.target/vax/cmpelim-eq-divsf.c: New test.
* gcc.target/vax/cmpelim-eq-divsi.c: New test.
* gcc.target/vax/cmpelim-eq-extendhisi.c: New test.
* gcc.target/vax/cmpelim-eq-extendqisi.c: New test.
* gcc.target/vax/cmpelim-eq-extvsi.c: New test.
* gcc.target/vax/cmpelim-eq-extzvsi.c: New test.
* gcc.target/vax/cmpelim-eq-fixdfhi.c: New test.
* gcc.target/vax/cmpelim-eq-fixdfqi.c: New test.
* gcc.target/vax/cmpelim-eq-fixdfsi.c: New test.
* gcc.target/vax/cmpelim-eq-fixsfhi.c: New test.
* gcc.target/vax/cmpelim-eq-fixsfqi.c: New test.
* gcc.target/vax/cmpelim-eq-fixsfsi.c: New test.
* gcc.target/vax/cmpelim-eq-floatsisf.c: New test.
* gcc.target/vax/cmpelim-eq-insvsi.c: New test.
* gcc.target/vax/cmpelim-eq-iorhi.c: New test.
* gcc.target/vax/cmpelim-eq-iorqi.c: New test.
* gcc.target/vax/cmpelim-eq-iorsi.c: New test.
* gcc.target/vax/cmpelim-eq-mova.c: New test.
* gcc.target/vax/cmpelim-eq-movdf.c: New test.
* gcc.target/vax/cmpelim-eq-movhi.c: New test.
* gcc.target/vax/cmpelim-eq-movqi.c: New test.
* gcc.target/vax/cmpelim-eq-movsf.c: New test.
* gcc.target/vax/cmpelim-eq-movsi.c: New test.
* gcc.target/vax/cmpelim-eq-muldf.c: New test.
* gcc.target/vax/cmpelim-eq-mulhi.c: New test.
* gcc.target/vax/cmpelim-eq-mulqi.c: New test.
* gcc.target/vax/cmpelim-eq-mulsf.c: New test.
* gcc.target/vax/cmpelim-eq-mulsi.c: New test.
* gcc.target/vax/cmpelim-eq-nothi.c: New test.
* gcc.target/vax/cmpelim-eq-notqi.c: New test.
* gcc.target/vax/cmpelim-eq-notsi.c: New test.
* gcc.target/vax/cmpelim-eq-rotlsi.c: New test.
* gcc.target/vax/cmpelim-eq-rotrsi.c: New test.
* gcc.target/vax/cmpelim-eq-subdf.c: New test.
* gcc.target/vax/cmpelim-eq-subhi.c: New test.
* gcc.target/vax/cmpelim-eq-subqi.c: New test.
* gcc.target/vax/cmpelim-eq-subsf.c: New test.
* gcc.target/vax/cmpelim-eq-subsi.c: New test.
* gcc.target/vax/cmpelim-eq-truncdfsf.c: New test.
* gcc.target/vax/cmpelim-eq-trunchiqi.c: New test.
* gcc.target/vax/cmpelim-eq-truncsihi.c: New test.
* gcc.target/vax/cmpelim-eq-truncsiqi.c: New test.
* gcc.target/vax/cmpelim-eq-zextendhisi.c: New test.
* gcc.target/vax/cmpelim-eq-zextendqihi.c: New test.
* gcc.target/vax/cmpelim-eq-zextendqisi.c: New test.
* gcc.target/vax/cmpelim-le-adddf.c: New test.
* gcc.target/vax/cmpelim-le-addhi.c: New test.
* gcc.target/vax/cmpelim-le-addqi.c: New test.
* gcc.target/vax/cmpelim-le-addsf.c: New test.
* gcc.target/vax/cmpelim-le-addsi.c: New test.
* gcc.target/vax/cmpelim-le-andhi.c: New test.
* gcc.target/vax/cmpelim-le-andqi.c: New test.
* gcc.target/vax/cmpelim-le-andsi.c: New test.
* gcc.target/vax/cmpelim-le-ashlsi.c: New test.
* gcc.target/vax/cmpelim-le-ashrsi.c: New test.
* gcc.target/vax/cmpelim-le-divdf.c: New test.
* gcc.target/vax/cmpelim-le-divhi.c: New test.
* gcc.target/vax/cmpelim-le-divqi.c: New test.
* gcc.target/vax/cmpelim-le-divsf.c: New test.
* gcc.target/vax/cmpelim-le-divsi.c: New test.
* gcc.target/vax/cmpelim-le-extendhisi.c: New test.
* gcc.target/vax/cmpelim-le-extendqisi.c: New test.
* gcc.target/vax/cmpelim-le-extvsi.c: New test.
* gcc.target/vax/cmpelim-le-extzvsi.c: New test.
* gcc.target/vax/cmpelim-le-fixdfhi.c: New test.
* gcc.target/vax/cmpelim-le-fixdfqi.c: New test.
* gcc.target/vax/cmpelim-le-fixdfsi.c: New test.
* gcc.target/vax/cmpelim-le-fixsfhi.c: New test.
* gcc.target/vax/cmpelim-le-fixsfqi.c: New test.
* gcc.target/vax/cmpelim-le-fixsfsi.c: New test.
* gcc.target/vax/cmpelim-le-floatsisf.c: New test.
* gcc.target/vax/cmpelim-le-insvsi.c: New test.
* gcc.target/vax/cmpelim-le-iorhi.c: New test.
* gcc.target/vax/cmpelim-le-iorqi.c: New test.
* gcc.target/vax/cmpelim-le-iorsi.c: New test.
* gcc.target/vax/cmpelim-le-movdf.c: New test.
* gcc.target/vax/cmpelim-le-movhi.c: New test.
* gcc.target/vax/cmpelim-le-movqi.c: New test.
* gcc.target/vax/cmpelim-le-movsf.c: New test.
* gcc.target/vax/cmpelim-le-movsi.c: New test.
* gcc.target/vax/cmpelim-le-muldf.c: New test.
* gcc.target/vax/cmpelim-le-mulhi.c: New test.
* gcc.target/vax/cmpelim-le-mulqi.c: New test.
* gcc.target/vax/cmpelim-le-mulsf.c: New test.
* gcc.target/vax/cmpelim-le-mulsi.c: New test.
* gcc.target/vax/cmpelim-le-nothi.c: New test.
* gcc.target/vax/cmpelim-le-notqi.c: New test.
* gcc.target/vax/cmpelim-le-notsi.c: New test.
* gcc.target/vax/cmpelim-le-rotlsi.c: New test.
* gcc.target/vax/cmpelim-le-rotrsi.c: New test.
* gcc.target/vax/cmpelim-le-subdf.c: New test.
* gcc.target/vax/cmpelim-le-subhi.c: New test.
* gcc.target/vax/cmpelim-le-subqi.c: New test.
* gcc.target/vax/cmpelim-le-subsf.c: New test.
* gcc.target/vax/cmpelim-le-subsi.c: New test.
* gcc.target/vax/cmpelim-le-truncdfsf.c: New test.
* gcc.target/vax/cmpelim-le-xorhi.c: New test.
* gcc.target/vax/cmpelim-le-xorqi.c: New test.
* gcc.target/vax/cmpelim-le-xorsi.c: New test.
* gcc.target/vax/cmpelim-leu-subhi.c: New test.
* gcc.target/vax/cmpelim-leu-subqi.c: New test.
* gcc.target/vax/cmpelim-leu-subsi.c: New test.
* gcc.target/vax/cmpelim-lt-adddf.c: New test.
* gcc.target/vax/cmpelim-lt-addhi.c: New test.
* gcc.target/vax/cmpelim-lt-addqi.c: New test.
* gcc.target/vax/cmpelim-lt-addsf.c: New test.
* gcc.target/vax/cmpelim-lt-addsi.c: New test.
* gcc.target/vax/cmpelim-lt-andhi.c: New test.
* gcc.target/vax/cmpelim-lt-andqi.c: New test.
* gcc.target/vax/cmpelim-lt-andsi.c: New test.
* gcc.target/vax/cmpelim-lt-ashlsi.c: New test.
* gcc.target/vax/cmpelim-lt-ashrsi.c: New test.
* gcc.target/vax/cmpelim-lt-divdf.c: New test.
* gcc.target/vax/cmpelim-lt-divhi.c: New test.
* gcc.target/vax/cmpelim-lt-divqi.c: New test.
* gcc.target/vax/cmpelim-lt-divsf.c: New test.
* gcc.target/vax/cmpelim-lt-divsi.c: New test.
* gcc.target/vax/cmpelim-lt-extendhisi.c: New test.
* gcc.target/vax/cmpelim-lt-extendqisi.c: New test.
* gcc.target/vax/cmpelim-lt-extvsi.c: New test.
* gcc.target/vax/cmpelim-lt-extzvsi.c: New test.
* gcc.target/vax/cmpelim-lt-fixdfhi.c: New test.
* gcc.target/vax/cmpelim-lt-fixdfqi.c: New test.
* gcc.target/vax/cmpelim-lt-fixdfsi.c: New test.
* gcc.target/vax/cmpelim-lt-fixsfhi.c: New test.
* gcc.target/vax/cmpelim-lt-fixsfqi.c: New test.
* gcc.target/vax/cmpelim-lt-fixsfsi.c: New test.
* gcc.target/vax/cmpelim-lt-floatsisf.c: New test.
* gcc.target/vax/cmpelim-lt-insvsi.c: New test.
* gcc.target/vax/cmpelim-lt-iorhi.c: New test.
* gcc.target/vax/cmpelim-lt-iorqi.c: New test.
* gcc.target/vax/cmpelim-lt-iorsi.c: New test.
* gcc.target/vax/cmpelim-lt-movdf.c: New test.
* gcc.target/vax/cmpelim-lt-movhi.c: New test.
* gcc.target/vax/cmpelim-lt-movqi.c: New test.
* gcc.target/vax/cmpelim-lt-movsf.c: New test.
* gcc.target/vax/cmpelim-lt-movsi.c: New test.
* gcc.target/vax/cmpelim-lt-muldf.c: New test.
* gcc.target/vax/cmpelim-lt-mulhi.c: New test.
* gcc.target/vax/cmpelim-lt-mulqi.c: New test.
* gcc.target/vax/cmpelim-lt-mulsf.c: New test.
* gcc.target/vax/cmpelim-lt-mulsi.c: New test.
* gcc.target/vax/cmpelim-lt-nothi.c: New test.
* gcc.target/vax/cmpelim-lt-notqi.c: New test.
* gcc.target/vax/cmpelim-lt-notsi.c: New test.
* gcc.target/vax/cmpelim-lt-rotlsi.c: New test.
* gcc.target/vax/cmpelim-lt-rotrsi.c: New test.
* gcc.target/vax/cmpelim-lt-subdf.c: New test.
* gcc.target/vax/cmpelim-lt-subhi.c: New test.
* gcc.target/vax/cmpelim-lt-subqi.c: New test.
* gcc.target/vax/cmpelim-lt-subsf.c: New test.
* gcc.target/vax/cmpelim-lt-subsi.c: New test.
* gcc.target/vax/cmpelim-lt-truncdfsf.c: New test.
* gcc.target/vax/cmpelim-lt-xorhi.c: New test.
* gcc.target/vax/cmpelim-lt-xorqi.c: New test.
* gcc.target/vax/cmpelim-lt-xorsi.c: New test.
* gcc.target/vax/cmpelim-ltu-subhi.c: New test.
* gcc.target/vax/cmpelim-ltu-subqi.c: New test.
* gcc.target/vax/cmpelim-ltu-subsi.c: New test.
* gcc.target/vax/cmpelim-xx-addsi.c: New test.
* gcc.target/vax/cmpelim-xx-insvsi.c: New test.
* gcc.target/vax/cmpelim-xxu-subsi.c: New test.
* gcc.target/vax/peephole2-eq-andhi.c: New test.
* gcc.target/vax/peephole2-eq-andqi.c: New test.
* gcc.target/vax/peephole2-eq-andsi.c: New test.
* gcc.target/vax/peephole2-eq-cmpvsi.c: New test.
* gcc.target/vax/peephole2-eq-cmpzvsi.c: New test.
* gcc.target/vax/peephole2-eq-ctzhi-0.c: New test.
* gcc.target/vax/peephole2-eq-ctzhi-1.c: New test.
* gcc.target/vax/peephole2-eq-ctzqi-0.c: New test.
* gcc.target/vax/peephole2-eq-ctzqi-1.c: New test.
* gcc.target/vax/peephole2-eq-ctzsi-0.c: New test.
* gcc.target/vax/peephole2-eq-ctzsi-1.c: New test.
* gcc.target/vax/peephole2-eq-ffshi.c: New test.
* gcc.target/vax/peephole2-eq-ffsqi.c: New test.
* gcc.target/vax/peephole2-eq-ffssi.c: New test.
* gcc.target/vax/peephole2-le-andhi.c: New test.
* gcc.target/vax/peephole2-le-andqi.c: New test.
* gcc.target/vax/peephole2-le-andsi.c: New test.
* gcc.target/vax/peephole2-le-cmpvsi.c: New test.
* gcc.target/vax/peephole2-le-cmpzvsi.c: New test.
* gcc.target/vax/peephole2-leu-cmpvsi.c: New test.
* gcc.target/vax/peephole2-leu-cmpzvsi.c: New test.
* gcc.target/vax/peephole2-lt-andhi.c: New test.
* gcc.target/vax/peephole2-lt-andqi.c: New test.
* gcc.target/vax/peephole2-lt-andsi.c: New test.
* gcc.target/vax/peephole2-lt-cmpvsi.c: New test.
* gcc.target/vax/peephole2-lt-cmpzvsi.c: New test.
* gcc.target/vax/peephole2-ltu-cmpvsi.c: New test.
* gcc.target/vax/peephole2-ltu-cmpzvsi.c: New test.
Diff:
---
gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-eq-extendhisi.c | 30 ++++++++++++
.../gcc.target/vax/cmpelim-eq-extendqisi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c | 38 ++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c | 39 ++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c | 32 +++++++++++++
.../gcc.target/vax/cmpelim-eq-floatsisf.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c | 46 +++++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c | 34 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-eq-truncdfsf.c | 32 +++++++++++++
.../gcc.target/vax/cmpelim-eq-trunchiqi.c | 33 ++++++++++++++
.../gcc.target/vax/cmpelim-eq-truncsihi.c | 33 ++++++++++++++
.../gcc.target/vax/cmpelim-eq-truncsiqi.c | 33 ++++++++++++++
.../gcc.target/vax/cmpelim-eq-zextendhisi.c | 30 ++++++++++++
.../gcc.target/vax/cmpelim-eq-zextendqihi.c | 32 +++++++++++++
.../gcc.target/vax/cmpelim-eq-zextendqisi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-le-extendhisi.c | 30 ++++++++++++
.../gcc.target/vax/cmpelim-le-extendqisi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c | 38 ++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c | 32 +++++++++++++
.../gcc.target/vax/cmpelim-le-floatsisf.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c | 46 +++++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c | 34 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-le-truncdfsf.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-lt-extendhisi.c | 30 ++++++++++++
.../gcc.target/vax/cmpelim-lt-extendqisi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c | 38 ++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c | 32 +++++++++++++
.../gcc.target/vax/cmpelim-lt-floatsisf.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c | 46 +++++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c | 28 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c | 34 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c | 29 ++++++++++++
.../gcc.target/vax/cmpelim-lt-truncdfsf.c | 32 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c | 29 ++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c | 36 +++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c | 53 ++++++++++++++++++++++
gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c | 40 ++++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c | 36 +++++++++++++++
.../gcc.target/vax/peephole2-eq-cmpzvsi.c | 36 +++++++++++++++
.../gcc.target/vax/peephole2-eq-ctzhi-0.c | 32 +++++++++++++
.../gcc.target/vax/peephole2-eq-ctzhi-1.c | 34 ++++++++++++++
.../gcc.target/vax/peephole2-eq-ctzqi-0.c | 32 +++++++++++++
.../gcc.target/vax/peephole2-eq-ctzqi-1.c | 34 ++++++++++++++
.../gcc.target/vax/peephole2-eq-ctzsi-0.c | 32 +++++++++++++
.../gcc.target/vax/peephole2-eq-ctzsi-1.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c | 26 +++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c | 26 +++++++++++
gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c | 27 +++++++++++
gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c | 36 +++++++++++++++
.../gcc.target/vax/peephole2-le-cmpzvsi.c | 34 ++++++++++++++
.../gcc.target/vax/peephole2-leu-cmpvsi.c | 40 ++++++++++++++++
.../gcc.target/vax/peephole2-leu-cmpzvsi.c | 31 +++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c | 33 ++++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c | 30 ++++++++++++
gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c | 36 +++++++++++++++
.../gcc.target/vax/peephole2-lt-cmpzvsi.c | 34 ++++++++++++++
.../gcc.target/vax/peephole2-ltu-cmpvsi.c | 40 ++++++++++++++++
.../gcc.target/vax/peephole2-ltu-cmpzvsi.c | 31 +++++++++++++
203 files changed, 6382 insertions(+)
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c
new file mode 100644
index 00000000000..872d46bbd76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_adddf (float_t x, float_t y)
+{
+ x += y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addd3 4(%ap),12(%ap),%r0 # 35 [c=68] *adddf3_ccz/2
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addd2 $0d2.0e+0,%r0 # 34 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c
new file mode 100644
index 00000000000..3a5dbad72dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_addhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addw3 *8(%ap),*12(%ap),%r0 # 33 [c=64] *addhi3_ccz
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addw2 $2,%r0 # 32 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c
new file mode 100644
index 00000000000..b0fe468ee65
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_addqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addb3 *8(%ap),*12(%ap),%r0 # 33 [c=64] *addqi3_ccz
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addb2 $2,%r0 # 32 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c
new file mode 100644
index 00000000000..de9e9c1b9d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_addsf (float_t x, float_t y)
+{
+ x += y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addf3 4(%ap),8(%ap),%r0 # 34 [c=48] *addsf3_ccz/2
+ jeql .L1 # 36 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 33 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c
new file mode 100644
index 00000000000..6998e606a07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_addsi (int_t x, int_t y)
+{
+ x += y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addl3 4(%ap),8(%ap),%r0 # 33 [c=48] *addsi3_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c
new file mode 100644
index 00000000000..d4d0c59d2b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicw3 *12(%ap),*8(%ap),%r0 # 34 [c=44] *andhi3_2_ccz/1
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addw2 $2,%r0 # 33 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c
new file mode 100644
index 00000000000..efa0dfe95a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicb3 *12(%ap),*8(%ap),%r0 # 34 [c=44] *andqi3_2_ccz/1
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addb2 $2,%r0 # 33 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c
new file mode 100644
index 00000000000..9afc86090a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_andsi (int_t x, int_t y)
+{
+ x &= ~y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bicl3 8(%ap),4(%ap),%r0 # 35 [c=28] *andsi3_2_ccz/1
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addl2 $2,%r0 # 34 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c
new file mode 100644
index 00000000000..a824f2d1987
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_ashlsi (int_t x, short_t y)
+{
+ x <<= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ ashl 8(%ap),4(%ap),%r0 # 35 [c=56] *ashlsi3_ccz
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addl2 $2,%r0 # 34 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c
new file mode 100644
index 00000000000..5f1e3a41919
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_ashrsi (int_t x, short_t y)
+{
+ x >>= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 36 [c=16] *negqi2
+ ashl %r0,4(%ap),%r0 # 37 [c=52] *ashlnegsi3_2_ccz
+ jeql .L1 # 39 [c=26] *branch_ccz
+ addl2 $2,%r0 # 35 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c
new file mode 100644
index 00000000000..7101960351c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_divdf (float_t x, float_t y)
+{
+ x /= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divd3 12(%ap),4(%ap),%r0 # 35 [c=112] *divdf3_ccz/1
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addd2 $0d2.0e+0,%r0 # 34 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c
new file mode 100644
index 00000000000..03866f9554f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+eq_divhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divw3 *12(%ap),*8(%ap),%r0 # 38 [c=76] *divhi3_ccz/1
+ jeql .L2 # 40 [c=26] *branch_ccz
+ addw2 $2,%r0 # 37 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c
new file mode 100644
index 00000000000..e4cfbf0315c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+eq_divqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divb3 *12(%ap),*8(%ap),%r0 # 38 [c=76] *divqi3_ccz/1
+ jeql .L2 # 40 [c=26] *branch_ccz
+ addb2 $2,%r0 # 37 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c
new file mode 100644
index 00000000000..492becfd080
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_divsf (float_t x, float_t y)
+{
+ x /= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divf3 8(%ap),4(%ap),%r0 # 34 [c=60] *divsf3_ccz/1
+ jeql .L1 # 36 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 33 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c
new file mode 100644
index 00000000000..324614fdbd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_divsi (int_t x, int_t y)
+{
+ x /= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divl3 8(%ap),4(%ap),%r0 # 33 [c=60] *divsi3_ccz/1
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c
new file mode 100644
index 00000000000..f875da9202c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+eq_extendhisi (int_t x)
+{
+ x = (short_t) x;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtwl 4(%ap),%r0 # 33 [c=20] *extendhisi2_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c
new file mode 100644
index 00000000000..16a6acd8098
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_extendqisi (int_t x)
+{
+ x = (short_t) x;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtbl 4(%ap),%r0 # 33 [c=20] *extendqisi2_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c
new file mode 100644
index 00000000000..5383059fe01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+eq_extvsi (bit_t x)
+{
+ int_t v;
+
+ v = x.i;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ extv $7,$18,4(%ap),%r0 # 32 [c=68] *extv_non_const_2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c
new file mode 100644
index 00000000000..d21fa293936
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+eq_extzvsi (bit_t x)
+{
+ int_t v;
+
+ v = x.i;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ rotl $25,4(%ap),%r0 # 32 [c=68] *extzv_non_const_2_ccz
+ bicl2 $-262144,%r0
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c
new file mode 100644
index 00000000000..8912d14b31a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_fixdfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdw 8(%ap),%r0 # 31 [c=36] *fix_truncdfhi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addw2 $2,%r0 # 30 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c
new file mode 100644
index 00000000000..12f9385bba2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_fixdfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdb 8(%ap),%r0 # 31 [c=36] *fix_truncdfqi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addb2 $2,%r0 # 30 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c
new file mode 100644
index 00000000000..ad54d88b9ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_fixdfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdl 4(%ap),%r0 # 32 [c=36] *fix_truncdfsi2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c
new file mode 100644
index 00000000000..0c26857c014
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_fixsfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfw 8(%ap),%r0 # 31 [c=36] *fix_truncsfhi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addw2 $2,%r0 # 30 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c
new file mode 100644
index 00000000000..2d32525bc29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_fixsfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfb 8(%ap),%r0 # 31 [c=36] *fix_truncsfqi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addb2 $2,%r0 # 30 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c
new file mode 100644
index 00000000000..a704ad8600a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_fixsfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfl 4(%ap),%r0 # 32 [c=36] *fix_truncsfsi2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c
new file mode 100644
index 00000000000..1ea83cc8ef7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+eq_floatsisf (int_t x)
+{
+ float_t v;
+
+ v = x;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtlf 4(%ap),%r0 # 33 [c=32] *floatsisf2_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 32 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c
new file mode 100644
index 00000000000..fbdcdb43b06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+ {
+ int_t i;
+ struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ } b;
+ }
+bit_t;
+
+int
+eq_insvsi (bit_t x, int_t y)
+{
+ int_t v;
+
+ v = x.b.i;
+ x.b.i = y;
+ if (v != 0)
+ return x.i;
+ else
+ return x.i + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 35 [c=16] *movsi_2
+ extv $7,$18,%r0,%r1 # 36 [c=60] *extv_non_const_2_ccz
+ insv 8(%ap),$7,$18,%r0 # 8 [c=16] *insv_2
+ jneq .L1 # 38 [c=26] *branch_ccz
+ addl2 $2,%r0 # 34 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c
new file mode 100644
index 00000000000..9bbe881897e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_iorhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisw3 *12(%ap),*8(%ap),%r0 # 32 [c=44] *iorhi3_ccz/2
+ jeql .L2 # 34 [c=26] *branch_ccz
+ addw2 $2,%r0 # 31 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c
new file mode 100644
index 00000000000..82f3f6bb7c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_iorqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisb3 *12(%ap),*8(%ap),%r0 # 32 [c=44] *iorqi3_ccz/2
+ jeql .L2 # 34 [c=26] *branch_ccz
+ addb2 $2,%r0 # 31 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c
new file mode 100644
index 00000000000..dd4490d9fd2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_iorsi (int_t x, int_t y)
+{
+ x |= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bisl3 8(%ap),4(%ap),%r0 # 33 [c=28] *iorsi3_ccz/2
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c
new file mode 100644
index 00000000000..286025f4982
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+extern char __attribute__ ((weak)) c;
+
+char *
+eq_mova (char *p)
+{
+ char *v;
+
+ v = &c;
+ if (v)
+ return v;
+ return p;
+}
+
+/* Expect assembly like:
+
+ movab c,%r0 # 35 [c=12] *movsym_2_ccz
+ jeql .L6 # 37 [c=26] *branch_ccz
+ ret # 43 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsym\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c
new file mode 100644
index 00000000000..c83e966c889
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_movdf (float_t x)
+{
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movd 4(%ap),%r0 # 34 [c=24] *movdf_ccz/1
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addd2 $0d2.0e+0,%r0 # 33 [c=56] *adddf3/0
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c
new file mode 100644
index 00000000000..99832dcf74d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_movhi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r0 # 31 [c=24] *movhi_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addw2 $2,%r0 # 30 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c
new file mode 100644
index 00000000000..5014b8bcbc6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_movqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r0 # 31 [c=24] *movqi_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addb2 $2,%r0 # 30 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c
new file mode 100644
index 00000000000..89074613d8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_movsf (float_t x)
+{
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movf 4(%ap),%r0 # 33 [c=16] *movsf_ccz/1
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 32 [c=36] *addsf3/0
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c
new file mode 100644
index 00000000000..1e65f4b81f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_movsi (int_t x)
+{
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 32 [c=16] *movsi_2_ccz
+ jeql .L2 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c
new file mode 100644
index 00000000000..7271c218d33
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_muldf (float_t x, float_t y)
+{
+ x *= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ muld3 4(%ap),12(%ap),%r0 # 35 [c=80] *muldf3_ccz/2
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addd2 $0d2.0e+0,%r0 # 34 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c
new file mode 100644
index 00000000000..d44a62250d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_mulhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulw3 *8(%ap),*12(%ap),%r0 # 33 [c=72] *mulhi3_ccz/2
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addw2 $2,%r0 # 32 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c
new file mode 100644
index 00000000000..2451843e704
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_mulqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulb3 *8(%ap),*12(%ap),%r0 # 33 [c=72] *mulqi3_ccz/2
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addb2 $2,%r0 # 32 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c
new file mode 100644
index 00000000000..824487bf488
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_mulsf (float_t x, float_t y)
+{
+ x *= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mulf3 4(%ap),8(%ap),%r0 # 34 [c=52] *mulsf3_ccz/2
+ jeql .L1 # 36 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 33 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c
new file mode 100644
index 00000000000..fbefa541784
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_mulsi (int_t x, int_t y)
+{
+ x *= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mull3 4(%ap),8(%ap),%r0 # 33 [c=56] *mulsi3_ccz/2
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c
new file mode 100644
index 00000000000..79b274c7841
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_nothi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomw *8(%ap),%r0 # 31 [c=24] *one_cmplhi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addw2 $2,%r0 # 30 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c
new file mode 100644
index 00000000000..ae98a2fbc7e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_notqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomb *8(%ap),%r0 # 31 [c=24] *one_cmplqi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addb2 $2,%r0 # 30 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c
new file mode 100644
index 00000000000..ba5b735e01b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_notsi (int_t x)
+{
+ x = ~x;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mcoml 4(%ap),%r0 # 32 [c=16] *one_cmplsi2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c
new file mode 100644
index 00000000000..17c48687299
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+eq_rotlsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x << y | x >> 8 * sizeof (x) - y;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ rotl 8(%ap),4(%ap),%r0 # 36 [c=40] *rotlsi3_ccz
+ jeql .L1 # 38 [c=26] *branch_ccz
+ addl2 $2,%r0 # 35 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c
new file mode 100644
index 00000000000..ffbca234867
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+eq_rotrsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x >> y | x << 8 * sizeof (x) - y;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 37 [c=16] *negqi2
+ rotl %r0,4(%ap),%r0 # 38 [c=36] *rotrnegsi3_2_ccz
+ jeql .L1 # 40 [c=26] *branch_ccz
+ addl2 $2,%r0 # 36 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c
new file mode 100644
index 00000000000..a8d3f1f93a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_subdf (float_t x, float_t y)
+{
+ x -= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subd3 12(%ap),4(%ap),%r0 # 35 [c=68] *subdf3_ccz/1
+ jeql .L1 # 37 [c=26] *branch_ccz
+ addd2 $0d2.0e+0,%r0 # 34 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c
new file mode 100644
index 00000000000..f01b4b6f968
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_subhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subw3 *12(%ap),*8(%ap),%r0 # 33 [c=64] *subhi3_ccz/1
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addw2 $2,%r0 # 32 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c
new file mode 100644
index 00000000000..733e30f8b05
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_subqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subb3 *12(%ap),*8(%ap),%r0 # 33 [c=64] *subqi3_ccz/1
+ jeql .L2 # 35 [c=26] *branch_ccz
+ addb2 $2,%r0 # 32 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c
new file mode 100644
index 00000000000..34e8555ca19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_subsf (float_t x, float_t y)
+{
+ x -= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subf3 8(%ap),4(%ap),%r0 # 34 [c=48] *subsf3_ccz/1
+ jeql .L1 # 36 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 33 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c
new file mode 100644
index 00000000000..456e35a737e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_subsi (int_t x, int_t y)
+{
+ x -= y;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subl3 8(%ap),4(%ap),%r0 # 33 [c=48] *subsi3_ccz/1
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c
new file mode 100644
index 00000000000..7192d874aef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+eq_truncdfsf (double_t x)
+{
+ single_t v;
+
+ v = x;
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdf 4(%ap),%r0 # 33 [c=20] *truncdfsf2_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addf2 $0f2.0e+0,%r0 # 32 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c
new file mode 100644
index 00000000000..9e7a8850eae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_trunchiqi (short_t *w, int_t *x, int y)
+{
+ short_t v;
+
+ v = x[y];
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 12(%ap),%r0 # 33 [c=16] *movsi_2
+ cvtwb *8(%ap)[%r0],%r0 # 34 [c=28] *trunchiqi2_ccz
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addb2 $2,%r0 # 32 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "trunchiqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c
new file mode 100644
index 00000000000..36dd7dfccca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (HI))) short_t;
+
+void
+eq_truncsihi (short_t *w, int_t *x, int y)
+{
+ short_t v;
+
+ v = x[y];
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 12(%ap),%r0 # 33 [c=16] *movsi_2
+ cvtlw *8(%ap)[%r0],%r0 # 34 [c=28] *truncsihi2_ccz
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addw2 $2,%r0 # 32 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncsihi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c
new file mode 100644
index 00000000000..a0ee4cffa7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_truncsiqi (short_t *w, int_t *x, int y)
+{
+ short_t v;
+
+ v = x[y];
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 12(%ap),%r0 # 33 [c=16] *movsi_2
+ cvtlb *8(%ap)[%r0],%r0 # 34 [c=28] *truncsiqi2_ccz
+ jeql .L2 # 36 [c=26] *branch_ccz
+ addb2 $2,%r0 # 32 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncsiqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c
new file mode 100644
index 00000000000..2fa86dde7b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (HI))) short_t;
+
+int_t
+eq_zextendhisi (int_t x)
+{
+ x = (short_t) x;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movzwl 4(%ap),%r0 # 32 [c=20] *zero_extendhisi2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendhisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c
new file mode 100644
index 00000000000..16613c6e16f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_zextendqihi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = (short_t) *x;
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movzbw *8(%ap),%r0 # 31 [c=28] *zero_extendqihi2_ccz
+ jeql .L2 # 33 [c=26] *branch_ccz
+ addw2 $2,%r0 # 30 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendqihi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c
new file mode 100644
index 00000000000..bb75f73cd68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_zextendqisi (int_t x)
+{
+ x = (short_t) x;
+ if (x == 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movzbl 4(%ap),%r0 # 32 [c=20] *zero_extendqisi2_ccz
+ jeql .L1 # 34 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendqisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c
new file mode 100644
index 00000000000..383d51d662c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_adddf (float_t x, float_t y)
+{
+ x += y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addd3 4(%ap),12(%ap),%r0 # 29 [c=68] *adddf3_ccnz/2
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c
new file mode 100644
index 00000000000..19cc6219110
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_addhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addw3 *8(%ap),*12(%ap),%r0 # 29 [c=64] *addhi3_ccnz
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c
new file mode 100644
index 00000000000..291beb028f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_addqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addb3 *8(%ap),*12(%ap),%r0 # 29 [c=64] *addqi3_ccnz
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c
new file mode 100644
index 00000000000..e4596fe7c33
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_addsf (float_t x, float_t y)
+{
+ x += y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addf3 4(%ap),8(%ap),%r0 # 28 [c=48] *addsf3_ccnz/2
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c
new file mode 100644
index 00000000000..254b30c2ea7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_addsi (int_t x, int_t y)
+{
+ x += y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addl3 4(%ap),8(%ap),%r0 # 29 [c=48] *addsi3_ccnz
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c
new file mode 100644
index 00000000000..ddf04d90b6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicw3 *12(%ap),*8(%ap),%r0 # 30 [c=44] *andhi3_2_ccnz/1
+ jleq .L2 # 32 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 29 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c
new file mode 100644
index 00000000000..bd781dc1ad9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicb3 *12(%ap),*8(%ap),%r0 # 30 [c=44] *andqi3_2_ccnz/1
+ jleq .L2 # 32 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 29 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c
new file mode 100644
index 00000000000..81fd7ba9a8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_andsi (int_t x, int_t y)
+{
+ x &= ~y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bicl3 8(%ap),4(%ap),%r0 # 31 [c=28] *andsi3_2_ccnz/1
+ jleq .L1 # 33 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c
new file mode 100644
index 00000000000..2b677424b26
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_ashlsi (int_t x, short_t y)
+{
+ x <<= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ ashl 8(%ap),4(%ap),%r0 # 31 [c=56] *ashlsi3_ccnz
+ jleq .L1 # 33 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c
new file mode 100644
index 00000000000..c4d9f28d0e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_ashrsi (int_t x, short_t y)
+{
+ x >>= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 32 [c=16] *negqi2
+ ashl %r0,4(%ap),%r0 # 33 [c=52] *ashlnegsi3_2_ccnz
+ jleq .L1 # 35 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c
new file mode 100644
index 00000000000..62b419ccd43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_divdf (float_t x, float_t y)
+{
+ x /= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divd3 12(%ap),4(%ap),%r0 # 29 [c=112] *divdf3_ccnz/1
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c
new file mode 100644
index 00000000000..68ee4844fd2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+le_divhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divw3 *12(%ap),*8(%ap),%r0 # 34 [c=76] *divhi3_ccnz/1
+ jleq .L2 # 36 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 33 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c
new file mode 100644
index 00000000000..e0b0cd31754
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+le_divqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divb3 *12(%ap),*8(%ap),%r0 # 34 [c=76] *divqi3_ccnz/1
+ jleq .L2 # 36 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 33 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c
new file mode 100644
index 00000000000..b55b36e622d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_divsf (float_t x, float_t y)
+{
+ x /= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divf3 8(%ap),4(%ap),%r0 # 28 [c=60] *divsf3_ccnz/1
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c
new file mode 100644
index 00000000000..6a45a38c242
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_divsi (int_t x, int_t y)
+{
+ x /= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divl3 8(%ap),4(%ap),%r0 # 29 [c=60] *divsi3_ccnz/1
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c
new file mode 100644
index 00000000000..693c752f8aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+le_extendhisi (int_t x)
+{
+ x = (short_t) x;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtwl 4(%ap),%r0 # 29 [c=20] *extendhisi2_ccnz
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c
new file mode 100644
index 00000000000..4965bcff4d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_extendqisi (int_t x)
+{
+ x = (short_t) x;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtbl 4(%ap),%r0 # 29 [c=20] *extendqisi2_ccnz
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c
new file mode 100644
index 00000000000..641c8f0dd3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+le_extvsi (bit_t x)
+{
+ int_t v;
+
+ v = x.i;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ extv $7,$18,4(%ap),%r0 # 28 [c=68] *extv_non_const_2_ccnz
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c
new file mode 100644
index 00000000000..18dd7ff9bd9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+le_extzvsi (uint_t x, int_t y)
+{
+ int_t v;
+
+ v = x >> y;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 31 [c=40] *subqi3/1
+ extzv 8(%ap),%r0,4(%ap),%r0 # 32 [c=76] *extzv_non_const_2_ccnz
+ jleq .L1 # 34 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c
new file mode 100644
index 00000000000..ea649c63c52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_fixdfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdw 8(%ap),%r0 # 27 [c=36] *fix_truncdfhi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c
new file mode 100644
index 00000000000..a53e9367c04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_fixdfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdb 8(%ap),%r0 # 27 [c=36] *fix_truncdfqi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c
new file mode 100644
index 00000000000..bcf5f364155
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_fixdfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdl 4(%ap),%r0 # 28 [c=36] *fix_truncdfsi2_ccnz
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c
new file mode 100644
index 00000000000..2301500531b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_fixsfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfw 8(%ap),%r0 # 27 [c=36] *fix_truncsfhi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c
new file mode 100644
index 00000000000..34a47837134
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_fixsfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfb 8(%ap),%r0 # 27 [c=36] *fix_truncsfqi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c
new file mode 100644
index 00000000000..39735af7e51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_fixsfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfl 4(%ap),%r0 # 28 [c=36] *fix_truncsfsi2_ccnz
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c
new file mode 100644
index 00000000000..bab7101c3a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+le_floatsisf (int_t x)
+{
+ float_t v;
+
+ v = x;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtlf 4(%ap),%r0 # 27 [c=32] *floatsisf2_ccnz
+ jleq .L1 # 29 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 26 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c
new file mode 100644
index 00000000000..26c368ba9cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+ {
+ int_t i;
+ struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ } b;
+ }
+bit_t;
+
+int
+le_insvsi (bit_t x, int_t y)
+{
+ int_t v;
+
+ v = x.b.i;
+ x.b.i = y;
+ if (v <= 0)
+ return x.i;
+ else
+ return x.i + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 37 [c=16] *movsi_2
+ extv $7,$18,%r0,%r1 # 38 [c=60] *extv_non_const_2_ccnz
+ insv 8(%ap),$7,$18,%r0 # 8 [c=16] *insv_2
+ jleq .L1 # 40 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 36 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c
new file mode 100644
index 00000000000..26a4d765778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_iorhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisw3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *iorhi3_ccnz/2
+ jleq .L2 # 30 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c
new file mode 100644
index 00000000000..fbb97b33e54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_iorqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisb3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *iorqi3_ccnz/2
+ jleq .L2 # 30 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c
new file mode 100644
index 00000000000..4cf50fe89ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_iorsi (int_t x, int_t y)
+{
+ x |= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bisl3 8(%ap),4(%ap),%r0 # 29 [c=28] *iorsi3_ccnz/2
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c
new file mode 100644
index 00000000000..acbaa2d3a85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_movdf (float_t x)
+{
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movd 4(%ap),%r0 # 34 [c=24] *movdf_ccnz/1
+ jleq .L1 # 36 [c=26] *branch_ccnz
+ addd2 $0d2.0e+0,%r0 # 33 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c
new file mode 100644
index 00000000000..3e99f872101
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_movhi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r0 # 27 [c=24] *movhi_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c
new file mode 100644
index 00000000000..8c73a822240
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_movqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r0 # 27 [c=24] *movqi_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c
new file mode 100644
index 00000000000..71a70b8e70d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_movsf (float_t x)
+{
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movf 4(%ap),%r0 # 33 [c=16] *movsf_ccnz/1
+ jleq .L1 # 35 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 32 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c
new file mode 100644
index 00000000000..2203f8b1713
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_movsi (int_t x)
+{
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 34 [c=16] *movsi_2_ccnz
+ jleq .L1 # 36 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 33 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c
new file mode 100644
index 00000000000..ed3193def4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_muldf (float_t x, float_t y)
+{
+ x *= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ muld3 4(%ap),12(%ap),%r0 # 29 [c=80] *muldf3_ccnz/2
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c
new file mode 100644
index 00000000000..426a469be1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_mulhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulw3 *8(%ap),*12(%ap),%r0 # 29 [c=72] *mulhi3_ccnz/2
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c
new file mode 100644
index 00000000000..ca3bb48d951
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_mulqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulb3 *8(%ap),*12(%ap),%r0 # 29 [c=72] *mulqi3_ccnz/2
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c
new file mode 100644
index 00000000000..0d3ac3776d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_mulsf (float_t x, float_t y)
+{
+ x *= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mulf3 4(%ap),8(%ap),%r0 # 28 [c=52] *mulsf3_ccnz/2
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c
new file mode 100644
index 00000000000..de72158569e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_mulsi (int_t x, int_t y)
+{
+ x *= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mull3 4(%ap),8(%ap),%r0 # 29 [c=56] *mulsi3_ccnz/2
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c
new file mode 100644
index 00000000000..6884a782e01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_nothi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomw *8(%ap),%r0 # 27 [c=24] *one_cmplhi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c
new file mode 100644
index 00000000000..60a9e615484
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_notqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomb *8(%ap),%r0 # 27 [c=24] *one_cmplqi2_ccnz
+ jleq .L2 # 29 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c
new file mode 100644
index 00000000000..938a6b3a4d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_notsi (int_t x)
+{
+ x = ~x;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mcoml 4(%ap),%r0 # 28 [c=16] *one_cmplsi2_ccnz
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c
new file mode 100644
index 00000000000..9e01429cd0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+le_rotlsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x << y | x >> 8 * sizeof (x) - y;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ rotl 8(%ap),4(%ap),%r0 # 32 [c=40] *rotlsi3_ccnz
+ jleq .L1 # 34 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c
new file mode 100644
index 00000000000..4fe533bc086
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+le_rotrsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x >> y | x << 8 * sizeof (x) - y;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 33 [c=16] *negqi2
+ rotl %r0,4(%ap),%r0 # 34 [c=36] *rotrnegsi3_2_ccnz
+ jleq .L1 # 36 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c
new file mode 100644
index 00000000000..0456cd32bb5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_subdf (float_t x, float_t y)
+{
+ x -= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subd3 12(%ap),4(%ap),%r0 # 29 [c=68] *subdf3_ccnz/1
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c
new file mode 100644
index 00000000000..4391b76b7be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_subhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subw3 *12(%ap),*8(%ap),%r0 # 29 [c=64] *subhi3_ccnz/1
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c
new file mode 100644
index 00000000000..f725be9b809
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_subqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subb3 *12(%ap),*8(%ap),%r0 # 29 [c=64] *subqi3_ccnz/1
+ jleq .L2 # 31 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c
new file mode 100644
index 00000000000..77a9bf06b11
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_subsf (float_t x, float_t y)
+{
+ x -= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subf3 8(%ap),4(%ap),%r0 # 28 [c=48] *subsf3_ccnz/1
+ jleq .L1 # 30 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c
new file mode 100644
index 00000000000..db64ffc5b57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_subsi (int_t x, int_t y)
+{
+ x -= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subl3 8(%ap),4(%ap),%r0 # 29 [c=48] *subsi3_ccnz/1
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c
new file mode 100644
index 00000000000..6e7673d607f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+le_truncdfsf (double_t x)
+{
+ single_t v;
+
+ v = x;
+ if (v <= 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdf 4(%ap),%r0 # 27 [c=20] *truncdfsf2_ccnz
+ jleq .L1 # 29 [c=26] *branch_ccnz
+ addf2 $0f2.0e+0,%r0 # 26 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c
new file mode 100644
index 00000000000..e65eed8a4bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_xorhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x ^ *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ xorw3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *xorhi3_ccnz/2
+ jleq .L2 # 30 [c=26] *branch_ccnz
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c
new file mode 100644
index 00000000000..ca8d5fb80a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_xorqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x ^ *y;
+ if (v <= 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ xorb3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *xorqi3_ccnz/2
+ jleq .L2 # 30 [c=26] *branch_ccnz
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c
new file mode 100644
index 00000000000..3de63cabc39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_xorsi (int_t x, int_t y)
+{
+ x ^= y;
+ if (x <= 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ xorl3 8(%ap),4(%ap),%r0 # 29 [c=28] *xorsi3_ccnz/2
+ jleq .L1 # 31 [c=26] *branch_ccnz
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c
new file mode 100644
index 00000000000..5f3e372d5e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+
+void
+leu_subhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (*x <= *y)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r2 # 28 [c=24] *movhi
+ movw *12(%ap),%r1 # 29 [c=24] *movhi
+ subw3 %r1,%r2,%r0 # 30 [c=32] *subhi3_cc/1
+ jlequ .L2 # 32 [c=26] *branch_cc
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c
new file mode 100644
index 00000000000..97ef2a9836b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (QI))) int_t;
+
+void
+leu_subqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (*x <= *y)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r2 # 28 [c=24] *movqi
+ movb *12(%ap),%r1 # 29 [c=24] *movqi
+ subb3 %r1,%r2,%r0 # 30 [c=32] *subqi3_cc/1
+ jlequ .L2 # 32 [c=26] *branch_cc
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c
new file mode 100644
index 00000000000..9402fab0ea2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+leu_subsi (int_t x, int_t y)
+{
+ int_t v;
+
+ v = x - y;
+ if (x <= y)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r2 # 27 [c=16] *movsi_2
+ movl 8(%ap),%r1 # 28 [c=16] *movsi_2
+ subl3 %r1,%r2,%r0 # 29 [c=32] *subsi3_cc/1
+ jlequ .L1 # 31 [c=26] *branch_cc
+ addl2 $2,%r0 # 26 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c
new file mode 100644
index 00000000000..6e3718d5e2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_adddf (float_t x, float_t y)
+{
+ x += y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addd3 4(%ap),12(%ap),%r0 # 29 [c=68] *adddf3_ccn/2
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c
new file mode 100644
index 00000000000..a93675a500f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_addhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addw3 *8(%ap),*12(%ap),%r0 # 29 [c=64] *addhi3_ccn
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c
new file mode 100644
index 00000000000..32a1328ae12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_addqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x + *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ addb3 *8(%ap),*12(%ap),%r0 # 29 [c=64] *addqi3_ccn
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c
new file mode 100644
index 00000000000..19c0b68b5f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_addsf (float_t x, float_t y)
+{
+ x += y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addf3 4(%ap),8(%ap),%r0 # 28 [c=48] *addsf3_ccn/2
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c
new file mode 100644
index 00000000000..1bb59d358ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_addsi (int_t x, int_t y)
+{
+ x += y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ addl3 4(%ap),8(%ap),%r0 # 29 [c=48] *addsi3_ccn
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c
new file mode 100644
index 00000000000..f7259311708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicw3 *12(%ap),*8(%ap),%r0 # 30 [c=44] *andhi3_2_ccn/1
+ jlss .L2 # 32 [c=26] *branch_ccn
+ addw2 $2,%r0 # 29 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c
new file mode 100644
index 00000000000..afae63586d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & ~*y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bicb3 *12(%ap),*8(%ap),%r0 # 30 [c=44] *andqi3_2_ccn/1
+ jlss .L2 # 32 [c=26] *branch_ccn
+ addb2 $2,%r0 # 29 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c
new file mode 100644
index 00000000000..5a86ddb51b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_andsi (int_t x, int_t y)
+{
+ x &= ~y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bicl3 8(%ap),4(%ap),%r0 # 31 [c=28] *andsi3_2_ccn/1
+ jlss .L1 # 33 [c=26] *branch_ccn
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c
new file mode 100644
index 00000000000..0c858936bf8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_ashlsi (int_t x, short_t y)
+{
+ x <<= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ ashl 8(%ap),4(%ap),%r0 # 31 [c=56] *ashlsi3_ccn
+ jlss .L1 # 33 [c=26] *branch_ccn
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c
new file mode 100644
index 00000000000..977f32cb4fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_ashrsi (int_t x, short_t y)
+{
+ x >>= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 32 [c=16] *negqi2
+ ashl %r0,4(%ap),%r0 # 33 [c=52] *ashlnegsi3_2_ccn
+ jlss .L1 # 35 [c=26] *branch_ccn
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c
new file mode 100644
index 00000000000..ddcb8c1ccd9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_divdf (float_t x, float_t y)
+{
+ x /= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divd3 12(%ap),4(%ap),%r0 # 29 [c=112] *divdf3_ccn/1
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c
new file mode 100644
index 00000000000..23bbf425544
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+lt_divhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divw3 *12(%ap),*8(%ap),%r0 # 34 [c=76] *divhi3_ccn/1
+ jlss .L2 # 36 [c=26] *branch_ccn
+ addw2 $2,%r0 # 33 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c
new file mode 100644
index 00000000000..5401b6b23e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+lt_divqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x / *y;
+ if (v[0] < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ divb3 *12(%ap),*8(%ap),%r0 # 34 [c=76] *divqi3_ccn/1
+ jlss .L2 # 36 [c=26] *branch_ccn
+ addb2 $2,%r0 # 33 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c
new file mode 100644
index 00000000000..89d5930bcc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_divsf (float_t x, float_t y)
+{
+ x /= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divf3 8(%ap),4(%ap),%r0 # 28 [c=60] *divsf3_ccn/1
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c
new file mode 100644
index 00000000000..5c50635d897
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_divsi (int_t x, int_t y)
+{
+ x /= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ divl3 8(%ap),4(%ap),%r0 # 29 [c=60] *divsi3_ccn/1
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c
new file mode 100644
index 00000000000..5dcc89aad35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+lt_extendhisi (int_t x)
+{
+ x = (short_t) x;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtwl 4(%ap),%r0 # 29 [c=20] *extendhisi2_ccn
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c
new file mode 100644
index 00000000000..9ec5a415bb5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_extendqisi (int_t x)
+{
+ x = (short_t) x;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ cvtbl 4(%ap),%r0 # 29 [c=20] *extendqisi2_ccn
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c
new file mode 100644
index 00000000000..a10435ba78c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+lt_extvsi (bit_t x)
+{
+ int_t v;
+
+ v = x.i;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ extv $7,$18,4(%ap),%r0 # 28 [c=68] *extv_non_const_2_ccn
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c
new file mode 100644
index 00000000000..e019d741193
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+lt_extzvsi (uint_t x, int_t y)
+{
+ int_t v;
+
+ v = x >> y;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 31 [c=40] *subqi3/1
+ extzv 8(%ap),%r0,4(%ap),%r0 # 32 [c=76] *extzv_non_const_2_ccn
+ jlss .L1 # 34 [c=26] *branch_ccn
+ addl2 $2,%r0 # 30 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c
new file mode 100644
index 00000000000..5d63a22d098
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_fixdfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdw 8(%ap),%r0 # 27 [c=36] *fix_truncdfhi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c
new file mode 100644
index 00000000000..d1616558a18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_fixdfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdb 8(%ap),%r0 # 27 [c=36] *fix_truncdfqi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c
new file mode 100644
index 00000000000..b07d1dedab6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_fixdfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdl 4(%ap),%r0 # 28 [c=36] *fix_truncdfsi2_ccn
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c
new file mode 100644
index 00000000000..42c8d74e9c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_fixsfhi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfw 8(%ap),%r0 # 27 [c=36] *fix_truncsfhi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c
new file mode 100644
index 00000000000..49327ee7eaa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_fixsfqi (int_t *w, float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfb 8(%ap),%r0 # 27 [c=36] *fix_truncsfqi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c
new file mode 100644
index 00000000000..3d172910aeb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_fixsfsi (float_t x)
+{
+ int_t v;
+
+ v = x;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtfl 4(%ap),%r0 # 28 [c=36] *fix_truncsfsi2_ccn
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c
new file mode 100644
index 00000000000..cefc71ef908
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+lt_floatsisf (int_t x)
+{
+ float_t v;
+
+ v = x;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtlf 4(%ap),%r0 # 27 [c=32] *floatsisf2_ccn
+ jlss .L1 # 29 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 26 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c
new file mode 100644
index 00000000000..52f97ef4559
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+ {
+ int_t i;
+ struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ } b;
+ }
+bit_t;
+
+int
+lt_insvsi (bit_t x, int_t y)
+{
+ int_t v;
+
+ v = x.b.i;
+ x.b.i = y;
+ if (v < 0)
+ return x.i;
+ else
+ return x.i + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 37 [c=16] *movsi_2
+ extv $7,$18,%r0,%r1 # 38 [c=60] *extv_non_const_2_ccn
+ insv 8(%ap),$7,$18,%r0 # 8 [c=16] *insv_2
+ jlss .L1 # 40 [c=26] *branch_ccn
+ addl2 $2,%r0 # 36 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c
new file mode 100644
index 00000000000..edd91e1d791
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_iorhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisw3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *iorhi3_ccn/2
+ jlss .L2 # 30 [c=26] *branch_ccn
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c
new file mode 100644
index 00000000000..82a9e04e59a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_iorqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x | *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ bisb3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *iorqi3_ccn/2
+ jlss .L2 # 30 [c=26] *branch_ccn
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c
new file mode 100644
index 00000000000..12466868312
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_iorsi (int_t x, int_t y)
+{
+ x |= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ bisl3 8(%ap),4(%ap),%r0 # 29 [c=28] *iorsi3_ccn/2
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c
new file mode 100644
index 00000000000..02b4c5abf84
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_movdf (float_t x)
+{
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movd 4(%ap),%r0 # 34 [c=24] *movdf_ccn/1
+ jlss .L1 # 36 [c=26] *branch_ccn
+ addd2 $0d2.0e+0,%r0 # 33 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c
new file mode 100644
index 00000000000..51ce5b7eace
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_movhi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r0 # 27 [c=24] *movhi_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c
new file mode 100644
index 00000000000..fb5450cc63f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_movqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = *x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r0 # 27 [c=24] *movqi_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c
new file mode 100644
index 00000000000..1669f16209d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_movsf (float_t x)
+{
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movf 4(%ap),%r0 # 33 [c=16] *movsf_ccn/1
+ jlss .L1 # 35 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 32 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c
new file mode 100644
index 00000000000..b4cd073352b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_movsi (int_t x)
+{
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 34 [c=16] *movsi_2_ccn
+ jlss .L1 # 36 [c=26] *branch_ccn
+ addl2 $2,%r0 # 33 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c
new file mode 100644
index 00000000000..1f9279ba662
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_muldf (float_t x, float_t y)
+{
+ x *= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ muld3 4(%ap),12(%ap),%r0 # 29 [c=80] *muldf3_ccn/2
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c
new file mode 100644
index 00000000000..29a77e39d19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_mulhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulw3 *8(%ap),*12(%ap),%r0 # 29 [c=72] *mulhi3_ccn/2
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c
new file mode 100644
index 00000000000..844456e60e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_mulqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x * *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mulb3 *8(%ap),*12(%ap),%r0 # 29 [c=72] *mulqi3_ccn/2
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c
new file mode 100644
index 00000000000..ea1c083f4aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_mulsf (float_t x, float_t y)
+{
+ x *= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mulf3 4(%ap),8(%ap),%r0 # 28 [c=52] *mulsf3_ccn/2
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c
new file mode 100644
index 00000000000..5f46c8c573b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_mulsi (int_t x, int_t y)
+{
+ x *= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mull3 4(%ap),8(%ap),%r0 # 29 [c=56] *mulsi3_ccn/2
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c
new file mode 100644
index 00000000000..59d1d9a5dbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_nothi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomw *8(%ap),%r0 # 27 [c=24] *one_cmplhi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addw2 $2,%r0 # 26 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c
new file mode 100644
index 00000000000..7a2ef96e77e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_notqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = ~*x;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ mcomb *8(%ap),%r0 # 27 [c=24] *one_cmplqi2_ccn
+ jlss .L2 # 29 [c=26] *branch_ccn
+ addb2 $2,%r0 # 26 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c
new file mode 100644
index 00000000000..c3586b198fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_notsi (int_t x)
+{
+ x = ~x;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ mcoml 4(%ap),%r0 # 28 [c=16] *one_cmplsi2_ccn
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addl2 $2,%r0 # 27 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c
new file mode 100644
index 00000000000..7f5c89d14ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+lt_rotlsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x << y | x >> 8 * sizeof (x) - y;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ rotl 8(%ap),4(%ap),%r0 # 32 [c=40] *rotlsi3_ccn
+ jlss .L1 # 34 [c=26] *branch_ccn
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c
new file mode 100644
index 00000000000..6c9daf4b73e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+lt_rotrsi (ulong_t x, int_t y)
+{
+ long_t v;
+
+ v = x >> y | x << 8 * sizeof (x) - y;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ mnegb 8(%ap),%r0 # 33 [c=16] *negqi2
+ rotl %r0,4(%ap),%r0 # 34 [c=36] *rotrnegsi3_2_ccn
+ jlss .L1 # 36 [c=26] *branch_ccn
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c
new file mode 100644
index 00000000000..fb7bb1d2fe2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_subdf (float_t x, float_t y)
+{
+ x -= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subd3 12(%ap),4(%ap),%r0 # 29 [c=68] *subdf3_ccn/1
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addd2 $0d2.0e+0,%r0 # 28 [c=56] *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c
new file mode 100644
index 00000000000..d06af83554e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_subhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subw3 *12(%ap),*8(%ap),%r0 # 29 [c=64] *subhi3_ccn/1
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addw2 $2,%r0 # 28 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c
new file mode 100644
index 00000000000..254ad715e73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_subqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ subb3 *12(%ap),*8(%ap),%r0 # 29 [c=64] *subqi3_ccn/1
+ jlss .L2 # 31 [c=26] *branch_ccn
+ addb2 $2,%r0 # 28 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c
new file mode 100644
index 00000000000..26181d80174
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_subsf (float_t x, float_t y)
+{
+ x -= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subf3 8(%ap),4(%ap),%r0 # 28 [c=48] *subsf3_ccn/1
+ jlss .L1 # 30 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 27 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c
new file mode 100644
index 00000000000..6e98e4cbbc7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_subsi (int_t x, int_t y)
+{
+ x -= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ subl3 8(%ap),4(%ap),%r0 # 29 [c=48] *subsi3_ccn/1
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c
new file mode 100644
index 00000000000..98fac66bd37
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+lt_truncdfsf (double_t x)
+{
+ single_t v;
+
+ v = x;
+ if (v < 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtdf 4(%ap),%r0 # 27 [c=20] *truncdfsf2_ccn
+ jlss .L1 # 29 [c=26] *branch_ccn
+ addf2 $0f2.0e+0,%r0 # 26 [c=36] *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c
new file mode 100644
index 00000000000..be36e0a3334
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_xorhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x ^ *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ xorw3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *xorhi3_ccn/2
+ jlss .L2 # 30 [c=26] *branch_ccn
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c
new file mode 100644
index 00000000000..51b05e711fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_xorqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x ^ *y;
+ if (v < 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ xorb3 *12(%ap),*8(%ap),%r0 # 28 [c=44] *xorqi3_ccn/2
+ jlss .L2 # 30 [c=26] *branch_ccn
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c
new file mode 100644
index 00000000000..439e36d9657
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_xorsi (int_t x, int_t y)
+{
+ x ^= y;
+ if (x < 0)
+ return x;
+ else
+ return x + 2;
+}
+
+/* Expect assembly like:
+
+ xorl3 8(%ap),4(%ap),%r0 # 29 [c=28] *xorsi3_ccn/2
+ jlss .L1 # 31 [c=26] *branch_ccn
+ addl2 $2,%r0 # 28 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c
new file mode 100644
index 00000000000..7965322d93f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+
+void
+ltu_subhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (*x < *y)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r2 # 28 [c=24] *movhi
+ movw *12(%ap),%r1 # 29 [c=24] *movhi
+ subw3 %r1,%r2,%r0 # 30 [c=32] *subhi3_cc/1
+ jlssu .L2 # 32 [c=26] *branch_cc
+ addw2 $2,%r0 # 27 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c
new file mode 100644
index 00000000000..3ba1d0f37f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (QI))) int_t;
+
+void
+ltu_subqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x - *y;
+ if (*x < *y)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r2 # 28 [c=24] *movqi
+ movb *12(%ap),%r1 # 29 [c=24] *movqi
+ subb3 %r1,%r2,%r0 # 30 [c=32] *subqi3_cc/1
+ jlssu .L2 # 32 [c=26] *branch_cc
+ addb2 $2,%r0 # 27 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c
new file mode 100644
index 00000000000..542ff809a35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+ltu_subsi (int_t x, int_t y)
+{
+ int_t v;
+
+ v = x - y;
+ if (x < y)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r2 # 27 [c=16] *movsi_2
+ movl 8(%ap),%r1 # 28 [c=16] *movsi_2
+ subl3 %r1,%r2,%r0 # 29 [c=32] *subsi3_cc/1
+ jlssu .L1 # 31 [c=26] *branch_cc
+ addl2 $2,%r0 # 26 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c
new file mode 100644
index 00000000000..033b1195c1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+xx_addsi (int_t x, int_t y)
+{
+ x += y;
+ if (x == 0)
+ return x;
+ else if (x >= 0)
+ return x + 2;
+ else
+ return x - 3;
+}
+
+/* Expect assembly like:
+
+ addl3 4(%ap),8(%ap),%r0 # 47 [c=48] *addsi3_ccnz
+ jeql .L1 # 49 [c=26] *branch_ccz
+ jlss .L3 # 46 [c=26] *branch_ccn
+ addl2 $2,%r0 # 44 [c=32] *addsi3
+ ret # 39 [c=0] return
+.L3:
+ subl2 $3,%r0 # 43 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c
new file mode 100644
index 00000000000..8f3e4ff8901
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c
@@ -0,0 +1,53 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+ {
+ int_t i;
+ struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ } b;
+ }
+bit_t;
+
+int
+xx_insvsi (bit_t x, int_t y)
+{
+ int_t v;
+
+ v = x.b.i;
+ x.b.i = y;
+ if (v == 0)
+ return x.i;
+ else if (v >= 0)
+ return x.i + 2;
+ else
+ return x.i - 3;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r0 # 50 [c=16] *movsi_2
+ extv $7,$18,%r0,%r1 # 51 [c=60] *extv_non_const_2_ccnz
+ insv 8(%ap),$7,$18,%r0 # 8 [c=16] *insv_2
+ jeql .L1 # 53 [c=26] *branch_ccz
+ jlss .L4 # 49 [c=26] *branch_ccn
+ addl2 $2,%r0 # 47 [c=32] *addsi3
+ ret # 42 [c=0] return
+.L4:
+ subl2 $3,%r0 # 46 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c
new file mode 100644
index 00000000000..b9f730445fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+xxu_subsi (int_t x, int_t y)
+{
+ int_t v;
+
+ v = x - y;
+ if (x == y)
+ return v;
+ else if (x >= y)
+ return v + 2;
+ else
+ return v - 3;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r2 # 39 [c=16] *movsi_2
+ movl 8(%ap),%r1 # 40 [c=16] *movsi_2
+ subl3 %r1,%r2,%r0 # 41 [c=32] *subsi3_cc/1
+ jeql .L1 # 43 [c=26] *branch_ccz
+ jlssu .L3 # 38 [c=26] *branch_cc
+ addl2 $2,%r0 # 36 [c=32] *addsi3
+ ret # 31 [c=0] return
+.L3:
+ subl2 $3,%r0 # 35 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c
new file mode 100644
index 00000000000..485b32497ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v == 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitw *8(%ap),*12(%ap) # 50 [c=50] *bithi_ccz
+ jneq .L3 # 40 [c=26] *branch_ccz
+ movw $1,%r0 # 36 [c=4] *movhi
+ movw %r0,*4(%ap) # 34 [c=4] *movhi
+ ret # 46 [c=0] return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c
new file mode 100644
index 00000000000..ffea453b5ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v == 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitb *8(%ap),*12(%ap) # 50 [c=50] *bitqi_ccz
+ jneq .L3 # 40 [c=26] *branch_ccz
+ movb $1,%r0 # 36 [c=4] *movqi
+ movb %r0,*4(%ap) # 34 [c=4] *movqi
+ ret # 46 [c=0] return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c
new file mode 100644
index 00000000000..b84c35299ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_andsi (int_t x, int_t y)
+{
+ x &= y;
+ if (x == 0)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ bitl 4(%ap),8(%ap) # 52 [c=34] *bitsi_ccz
+ jneq .L6 # 41 [c=26] *branch_ccz
+ movl $1,%r0 # 36 [c=4] *movsi_2
+ ret # 47 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c
new file mode 100644
index 00000000000..3e09a78a7e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+eq_cmpvsi (bit_t x, int_t y)
+{
+ if (x.i == y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpv_ccz
+ jeql .L3 # 39 [c=26] *branch_ccz
+ movl $2,%r0 # 36 [c=4] *movsi_2
+ ret # 31 [c=0] return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c
new file mode 100644
index 00000000000..3713c1ddd47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+eq_extzvsi (bit_t x, int_t y)
+{
+ if (x.i == y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpzv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpzv_ccz
+ jeql .L3 # 39 [c=26] *branch_ccz
+ movl $2,%r0 # 36 [c=4] *movsi_2
+ ret # 31 [c=0] return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c
new file mode 100644
index 00000000000..8a56451cd16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ctzhi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = __builtin_ctz (*x);
+ if (*x == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movw *8(%ap),%r1 # 34 [c=24] *movhi
+ ffs $0,$16,%r1,%r0 # 49 [c=4] *ctzhi2_ccz
+ jeql .L3 # 38 [c=26] *branch_ccz
+ addw2 $2,%r0 # 33 [c=32] *addhi3
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 2 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c
new file mode 100644
index 00000000000..db76da433e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ctzhi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = __builtin_ctz (*x + 1);
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtwl *8(%ap),%r0 # 34 [c=28] *extendhisi2
+ incl %r0 # 35 [c=32] *addsi3
+ ffs $0,$32,%r0,%r0 # 36 [c=4] *ctzsi2
+ tstl %r0 # 37 [c=6] *cmpsi_ccz/0
+ jeql .L2 # 38 [c=26] *branch_ccz
+ addw2 $2,%r0 # 33 [c=32] *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c
new file mode 100644
index 00000000000..b6078bc2c78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ctzqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = __builtin_ctz (*x);
+ if (*x == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ movb *8(%ap),%r1 # 34 [c=24] *movqi
+ ffs $0,$8,%r1,%r0 # 49 [c=4] *ctzqi2_ccz
+ jeql .L3 # 38 [c=26] *branch_ccz
+ addb2 $2,%r0 # 33 [c=32] *addqi3
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 2 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c
new file mode 100644
index 00000000000..44311b98205
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ctzqi (int_t *w, int_t *x)
+{
+ int_t v;
+
+ v = __builtin_ctz (*x + 1);
+ if (v == 0)
+ *w = v;
+ else
+ *w = v + 2;
+}
+
+/* Expect assembly like:
+
+ cvtbl *8(%ap),%r0 # 34 [c=28] *extendqisi2
+ incl %r0 # 35 [c=32] *addsi3
+ ffs $0,$32,%r0,%r0 # 36 [c=4] *ctzsi2
+ tstl %r0 # 37 [c=6] *cmpsi_ccz/0
+ jeql .L2 # 38 [c=26] *branch_ccz
+ addb2 $2,%r0 # 33 [c=32] *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c
new file mode 100644
index 00000000000..bf84bdc0800
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ctzsi (int_t x)
+{
+ int_t v;
+
+ v = __builtin_ctz (x);
+ if (x == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r1 # 32 [c=16] *movsi_2
+ ffs $0,$32,%r1,%r0 # 45 [c=4] *ctzsi2_ccz
+ jeql .L1 # 35 [c=26] *branch_ccz
+ addl2 $2,%r0 # 31 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c
new file mode 100644
index 00000000000..0cc40ed363c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ctzsi (int_t x)
+{
+ int_t v;
+
+ v = __builtin_ctz (x + 1);
+ if (v == 0)
+ return v;
+ else
+ return v + 2;
+}
+
+/* Expect assembly like:
+
+ addl3 4(%ap),$1,%r0 # 33 [c=40] *addsi3
+ ffs $0,$32,%r0,%r0 # 34 [c=4] *ctzsi2
+ tstl %r0 # 35 [c=6] *cmpsi_ccz/0
+ jeql .L1 # 36 [c=26] *branch_ccz
+ addl2 $2,%r0 # 32 [c=32] *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c
new file mode 100644
index 00000000000..50a6cdb18bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ffshi (int_t *w, int_t *x)
+{
+ *w = __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+ ffs $0,$16,*8(%ap),%r1 # 40 [c=28] *ctzhi2_ccz
+ jneq .L2 # 30 [c=26] *branch_ccz
+ mnegl $1,%r1 # 26 [c=8] *negsi2
+.L2:
+ addw3 %r1,$1,*4(%ap) # 25 [c=32] *addhi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c
new file mode 100644
index 00000000000..0b3ef0ff848
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ffsqi (int_t *w, int_t *x)
+{
+ *w = __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+ ffs $0,$8,*8(%ap),%r1 # 40 [c=28] *ctzqi2_ccz
+ jneq .L2 # 30 [c=26] *branch_ccz
+ mnegl $1,%r1 # 26 [c=8] *negsi2
+.L2:
+ addb3 %r1,$1,*4(%ap) # 25 [c=32] *addqi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c
new file mode 100644
index 00000000000..0e321216020
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ffssi (int_t x)
+{
+ return __builtin_ffs (x);
+}
+
+/* Expect assembly like:
+
+ movl 4(%ap),%r1 # 28 [c=16] *movsi_2
+ ffs $0,$32,%r1,%r0 # 41 [c=4] *ctzsi2_ccz
+ jneq .L2 # 31 [c=26] *branch_ccz
+ mnegl $1,%r0 # 27 [c=8] *negsi2
+.L2:
+ incl %r0 # 26 [c=32] *addsi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c
new file mode 100644
index 00000000000..9eb40c0bc8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v <= 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitw *8(%ap),*12(%ap) # 56 [c=50] *bithi_ccnz
+ jleq .L6 # 46 [c=26] *branch_ccnz
+ movw $2,%r0 # 41 [c=4] *movhi
+ movw %r0,*4(%ap) # 40 [c=4] *movhi
+ ret # 52 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c
new file mode 100644
index 00000000000..14797b0c23a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v <= 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitb *8(%ap),*12(%ap) # 56 [c=50] *bitqi_ccnz
+ jleq .L6 # 46 [c=26] *branch_ccnz
+ movb $2,%r0 # 41 [c=4] *movqi
+ movb %r0,*4(%ap) # 40 [c=4] *movqi
+ ret # 52 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c
new file mode 100644
index 00000000000..6d1193ee239
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_andsi (int_t x, int_t y)
+{
+ x &= y;
+ if (x <= 0)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ bitl 4(%ap),8(%ap) # 58 [c=34] *bitsi_ccnz
+ jgtr .L6 # 47 [c=26] *branch_ccnz
+ movl $1,%r0 # 42 [c=4] *movsi_2
+ ret # 53 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c
new file mode 100644
index 00000000000..dd268493c77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+le_cmpvsi (bit_t x, int_t y)
+{
+ if (x.i <= y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpv_ccnz
+ jgtr .L6 # 39 [c=26] *branch_ccnz
+ movl $1,%r0 # 35 [c=4] *movsi_2
+ ret # 45 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c
new file mode 100644
index 00000000000..3cf028a9560
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+le_cmpzvsi (uint_t x, int_t y, int_t z)
+{
+ int_t v;
+
+ v = x >> y;
+ if (v <= z)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 39 [c=40] *subqi3/1
+ cmpzv 8(%ap),%r0,4(%ap),12(%ap) # 53 [c=96] *cmpzv_ccnz
+ jgtr .L6 # 42 [c=26] *branch_ccnz
+ movl $1,%r0 # 37 [c=4] *movsi_2
+ ret # 48 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c
new file mode 100644
index 00000000000..0a0468b7988
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+leu_cmpvsi (bit_t x, uint_t y)
+{
+ uint_t v;
+
+ v = x.i;
+ if (v <= y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpv_cc
+ jgtru .L6 # 39 [c=26] *branch_cc
+ movl $1,%r0 # 35 [c=4] *movsi_2
+ ret # 45 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c
new file mode 100644
index 00000000000..ca7cfe4dff9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+leu_cmpzvsi (uint_t x, int_t y, uint_t z)
+{
+ if (x >> y <= z)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 39 [c=40] *subqi3/1
+ cmpzv 8(%ap),%r0,4(%ap),12(%ap) # 53 [c=96] *cmpzv_cc
+ jgtru .L6 # 42 [c=26] *branch_cc
+ movl $1,%r0 # 37 [c=4] *movsi_2
+ ret # 48 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c
new file mode 100644
index 00000000000..9eb40c0bc8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v <= 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitw *8(%ap),*12(%ap) # 56 [c=50] *bithi_ccnz
+ jleq .L6 # 46 [c=26] *branch_ccnz
+ movw $2,%r0 # 41 [c=4] *movhi
+ movw %r0,*4(%ap) # 40 [c=4] *movhi
+ ret # 52 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c
new file mode 100644
index 00000000000..d71c46dad86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_andqi (int_t *w, int_t *x, int_t *y)
+{
+ int_t v;
+
+ v = *x & *y;
+ if (v < 0)
+ *w = 1;
+ else
+ *w = 2;
+}
+
+/* Expect assembly like:
+
+ bitb *8(%ap),*12(%ap) # 68 [c=50] *bitqi_ccn
+ jlss .L6 # 58 [c=26] *branch_ccn
+ movb $2,%r0 # 53 [c=4] *movqi
+ movb %r0,*4(%ap) # 52 [c=4] *movqi
+ ret # 64 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c
new file mode 100644
index 00000000000..4045b360ab5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_andsi (int_t x, int_t y)
+{
+ x &= y;
+ if (x < 0)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ bitl 4(%ap),8(%ap) # 68 [c=34] *bitsi_ccn
+ jgeq .L6 # 57 [c=26] *branch_ccn
+ movl $1,%r0 # 52 [c=4] *movsi_2
+ ret # 63 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c
new file mode 100644
index 00000000000..a50f322d488
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+lt_cmpvsi (bit_t x, int_t y)
+{
+ if (x.i < y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpv_ccn
+ jgeq .L6 # 39 [c=26] *branch_ccn
+ movl $1,%r0 # 35 [c=4] *movsi_2
+ ret # 45 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c
new file mode 100644
index 00000000000..de386431cfa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+lt_cmpzvsi (uint_t x, int_t y, int_t z)
+{
+ int_t v;
+
+ v = x >> y;
+ if (v < z)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 39 [c=40] *subqi3/1
+ cmpzv 8(%ap),%r0,4(%ap),12(%ap) # 53 [c=96] *cmpzv_ccn
+ jgeq .L6 # 42 [c=26] *branch_ccn
+ movl $1,%r0 # 37 [c=4] *movsi_2
+ ret # 48 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c
new file mode 100644
index 00000000000..8eba5051278
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+ {
+ int_t h : 7;
+ int_t i : 18;
+ int_t l : 7;
+ }
+bit_t;
+
+int_t
+ltu_cmpvsi (bit_t x, uint_t y)
+{
+ uint_t v;
+
+ v = x.i;
+ if (v < y)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ cmpv $7,$18,4(%ap),8(%ap) # 50 [c=88] *cmpv_cc
+ jgequ .L6 # 39 [c=26] *branch_cc
+ movl $1,%r0 # 35 [c=4] *movsi_2
+ ret # 45 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c
new file mode 100644
index 00000000000..9cdee86b18e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+ltu_cmpzvsi (uint_t x, int_t y, uint_t z)
+{
+ if (x >> y < z)
+ return 1;
+ else
+ return 2;
+}
+
+/* Expect assembly like:
+
+ subb3 8(%ap),$32,%r0 # 39 [c=40] *subqi3/1
+ cmpzv 8(%ap),%r0,4(%ap),12(%ap) # 53 [c=96] *cmpzv_cc
+ jgequ .L6 # 42 [c=26] *branch_cc
+ movl $1,%r0 # 37 [c=4] *movsi_2
+ ret # 48 [c=0] return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
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2020-12-05 18:30 [gcc r11-5797] PR target/95294: VAX: Add test cases for MODE_CC representation Maciej W. Rozycki
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