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From: Philipp Tomsich <ptomsich@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/vendors/ventana/heads/minor-improvements-for-gcc11)] RISC-V: branch-(not)equals-zero compares against $zero
Date: Thu, 17 Dec 2020 17:10:13 +0000 (GMT)	[thread overview]
Message-ID: <20201217171013.F00BD387084F@sourceware.org> (raw)

https://gcc.gnu.org/g:01acb29fa0a62492d13a3ece66abbb985f958997

commit 01acb29fa0a62492d13a3ece66abbb985f958997
Author: Philipp Tomsich <philipp.tomsich@vrull.eu>
Date:   Sun Aug 30 21:02:36 2020 +0200

    RISC-V: branch-(not)equals-zero compares against $zero
    
    If we are testing a register or a paradoxical subreg (i.e. anything that is not
    a partial subreg) for equality/non-equality with zero, we can generate a branch
    that compares against $zero.  This will work for QI, HI, SI and DImode, so we
    enable this for ANYI.
    
    2020-08-30  gcc/ChangeLog:
    
            * config/riscv/riscv.md (*branch<mode>_equals_zero): Added pattern.

Diff:
---
 gcc/config/riscv/riscv.md | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index f5cca5df102..d28971c5d0e 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1856,6 +1856,19 @@
 
 ;; Conditional branches
 
+(define_insn "*branch<mode>_equals_zero"
+  [(set (pc)
+  	(if_then_else
+	 (match_operator 1 "equality_operator"
+	 		 [(match_operand:ANYI 2 "register_operand" "r")
+			  (const_int 0)])
+	 (label_ref (match_operand 0 "" ""))
+	 (pc)))]
+  "!partial_subreg_p(operands[2])"
+  "b%C1\t%2,zero,%0"
+  [(set_attr "type" "branch")
+   (set_attr "mode" "none")])
+
 (define_insn "*branch<mode>"
   [(set (pc)
 	(if_then_else


             reply	other threads:[~2020-12-17 17:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-17 17:10 Philipp Tomsich [this message]
2021-01-04 17:01 Philipp Tomsich
2021-01-04 19:21 Philipp Tomsich

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