public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/vendors/ventana/heads/far-branch-for-gcc11)] RISC-V: The zero-register will never need be clobbered
@ 2021-01-04 19:19 Philipp Tomsich
  0 siblings, 0 replies; 2+ messages in thread
From: Philipp Tomsich @ 2021-01-04 19:19 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:e51229b6b88b54c9314ccd86f4e39fb1d1bd8070

commit e51229b6b88b54c9314ccd86f4e39fb1d1bd8070
Author: Philipp Tomsich <philipp.tomsich@vrull.eu>
Date:   Mon Jan 4 17:21:27 2021 +0100

    RISC-V: The zero-register will never need be clobbered
    
    The zero-register will never be clobbered and therefore will never
    need saving.  The respective code-path for interrupt handlers can
    therefore be used for all cases.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.c (riscv_save_reg_p): Move the test for
              the zero-register out of the interrupt-handler path, as the
              zero-register will never be clobbered.

Diff:
---
 gcc/config/riscv/riscv.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index c88aca8120e..27833f88a27 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3663,6 +3663,10 @@ riscv_save_reg_p (unsigned int regno)
   bool might_clobber = crtl->saves_all_registers
 		       || df_regs_ever_live_p (regno);
 
+  /* The $zero register is always zero.  */
+  if (regno == GP_REG_FIRST)
+    return false;
+
   if (call_saved && might_clobber)
     return true;
 
@@ -3675,10 +3679,6 @@ riscv_save_reg_p (unsigned int regno)
   /* If this is an interrupt handler, then must save extra registers.  */
   if (cfun->machine->interrupt_handler_p)
     {
-      /* zero register is always zero.  */
-      if (regno == GP_REG_FIRST)
-	return false;
-
       /* The function will return the stack pointer to its original value.  */
       if (regno == STACK_POINTER_REGNUM)
 	return false;


^ permalink raw reply	[flat|nested] 2+ messages in thread

* [gcc(refs/vendors/ventana/heads/far-branch-for-gcc11)] RISC-V: The zero-register will never need be clobbered
@ 2021-01-04 19:22 Philipp Tomsich
  0 siblings, 0 replies; 2+ messages in thread
From: Philipp Tomsich @ 2021-01-04 19:22 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:420d6565c17c0cd2c8e1cb2006c59636b1fe4260

commit 420d6565c17c0cd2c8e1cb2006c59636b1fe4260
Author: Philipp Tomsich <philipp.tomsich@vrull.eu>
Date:   Mon Jan 4 17:21:27 2021 +0100

    RISC-V: The zero-register will never need be clobbered
    
    The zero-register will never be clobbered and therefore will never
    need saving.  The respective code-path for interrupt handlers can
    therefore be used for all cases.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.c (riscv_save_reg_p): Move the test for
              the zero-register out of the interrupt-handler path, as the
              zero-register will never be clobbered.

Diff:
---
 gcc/config/riscv/riscv.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index c88aca8120e..27833f88a27 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3663,6 +3663,10 @@ riscv_save_reg_p (unsigned int regno)
   bool might_clobber = crtl->saves_all_registers
 		       || df_regs_ever_live_p (regno);
 
+  /* The $zero register is always zero.  */
+  if (regno == GP_REG_FIRST)
+    return false;
+
   if (call_saved && might_clobber)
     return true;
 
@@ -3675,10 +3679,6 @@ riscv_save_reg_p (unsigned int regno)
   /* If this is an interrupt handler, then must save extra registers.  */
   if (cfun->machine->interrupt_handler_p)
     {
-      /* zero register is always zero.  */
-      if (regno == GP_REG_FIRST)
-	return false;
-
       /* The function will return the stack pointer to its original value.  */
       if (regno == STACK_POINTER_REGNUM)
 	return false;


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-01-04 19:22 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-04 19:19 [gcc(refs/vendors/ventana/heads/far-branch-for-gcc11)] RISC-V: The zero-register will never need be clobbered Philipp Tomsich
2021-01-04 19:22 Philipp Tomsich

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).