[gcc/devel/omp/gcc-10] amdgcn: Allow V64DFmode min/max reductions

[gcc/devel/omp/gcc-10] amdgcn: Allow V64DFmode min/max reductions

[Andrew Stubbs]

https://gcc.gnu.org/g:f8fd4ad642bfc1be25bdfead85ae06e0a75fcea1

commit f8fd4ad642bfc1be25bdfead85ae06e0a75fcea1
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Mon Nov 9 17:42:34 2020 +0000

    amdgcn: Allow V64DFmode min/max reductions
    
    I don't know why these were disabled. There're no direct min/max DPP
    instructions for this mode, but the "use moves" strategy works fine.
    
    gcc/ChangeLog:
    
            * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions
            for V64DFmode min/max reductions.
    
    Backport from d9f50366102a8ca3521e4854f7716bd013c8ea0a.

Diff:
---
 gcc/config/gcn/gcn.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index f0e4636c06a..095de6a2f7e 100644
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -4363,7 +4363,8 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
 		      || unspec == UNSPEC_SMAX_DPP_SHR
 		      || unspec == UNSPEC_UMIN_DPP_SHR
 		      || unspec == UNSPEC_UMAX_DPP_SHR)
-		     && mode == V64DImode)
+		     && (mode == V64DImode
+			 || mode == V64DFmode))
 		    || (unspec == UNSPEC_PLUS_DPP_SHR
 			&& mode == V64DFmode));
   rtx_code code = (unspec == UNSPEC_SMIN_DPP_SHR ? SMIN