[gcc(refs/users/acsawdey/heads/fusion-combine)] WIP for add-add fusion

[Aaron Sawdey <acsawdey@gcc.gnu.org>]

https://gcc.gnu.org/g:969b08c4c1aefb4c0f2244ca1efed2164b108188

commit 969b08c4c1aefb4c0f2244ca1efed2164b108188
Author: Aaron Sawdey <acsawdey@linux.ibm.com>
Date:   Mon Jan 25 21:11:52 2021 -0600

    WIP for add-add fusion

Diff:
---
 gcc/config/rs6000/genfusion.pl | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 837af7ac123..1ea08a21a7c 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -234,6 +234,47 @@ EOF
   }
 }
 
+sub gen_addadd
+{
+
+    my ($kind, $vchr, $op, $mode, $pred, $constraint);
+  KIND: foreach $kind ('scalar','vector') {
+      if ( $kind eq 'vector' ) {
+	  $vchr = "v";
+	  $op = "vaddudm";
+	  $mode = "VM";
+	  $pred = "altivec_register_operand";
+	  $constraint = "v";
+      } else {
+	  $vchr = "";
+	  $op = "add";
+	  $mode = "GPR";
+	  $pred = "gpc_reg_operand";
+	  $constraint = "r";
+      }
+    my $insn = <<"EOF";
+;; add-add fusion pattern generated by gen_addadd
+(define_insn "*fuse_${op}_${op}"
+  [(set (match_operand:${mode} 3 "altivec_register_operand" "=&v,0,1,v")
+        (add:${mode} 
+           (add:${mode} (match_operand:VM 0 "altivec_register_operand" "v,v,v,v") 
+                        (match_operand:VM 1 "altivec_register_operand" "%v,v,v,v")) 
+           (match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
+   (clobber (match_scratch:VM 4 "=X,X,X,r"))]
+  "(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
+  "@
+   vxor %3,%1,%0\;vxor %3,%3,%2
+   vxor %0,%1,%0\;vxor %0,%0,%2
+   vxor %1,%1,%0\;vxor %1,%1,%2
+   vxor %4,%1,%0\;vxor %3,%4,%2"
+  [(set_attr "type" "logical")
+   (set_attr "cost" "6")
+   (set_attr "length" "8")])
+EOF
+  }
+    
+}
+
 gen_ld_cmpi_p10();
 gen_2logical();