From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1881) id C0B723858038; Sat, 30 Jan 2021 21:54:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C0B723858038 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Aaron Sawdey To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/acsawdey/heads/fusion-combine)] WIP for add-add fusion X-Act-Checkin: gcc X-Git-Author: Aaron Sawdey X-Git-Refname: refs/users/acsawdey/heads/fusion-combine X-Git-Oldrev: dee8750bdd38abff76c3611e4663e8d4e44c7836 X-Git-Newrev: 51e088f19a7e5d3f573ed0811b1ac171e84556be Message-Id: <20210130215430.C0B723858038@sourceware.org> Date: Sat, 30 Jan 2021 21:54:30 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Jan 2021 21:54:30 -0000 https://gcc.gnu.org/g:51e088f19a7e5d3f573ed0811b1ac171e84556be commit 51e088f19a7e5d3f573ed0811b1ac171e84556be Author: Aaron Sawdey Date: Mon Jan 25 21:11:52 2021 -0600 WIP for add-add fusion Diff: --- gcc/config/rs6000/fusion.md | 163 ++++++++++++++++++++--------------------- gcc/config/rs6000/genfusion.pl | 41 +++++++++++ 2 files changed, 122 insertions(+), 82 deletions(-) diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index 1ddbe7fe3d2..5ae3c32cc5b 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -1,7 +1,6 @@ -;; -*- buffer-read-only: t -*- ;; Generated automatically by genfusion.pl -;; Copyright (C) 2020 Free Software Foundation, Inc. +;; Copyright (C) 2020,2021 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -24,17 +23,17 @@ (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:DI 1 "non_update_memory_operand" "m") - (match_operand:DI 3 "const_m1_to_1_operand" "n"))) + (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "ld%X1 %0,%1\;cmpdi 0,%0,%3" + "ld%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + DImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -45,17 +44,17 @@ (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "m") - (match_operand:DI 3 "const_0_to_1_operand" "n"))) + (match_operand:DI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "ld%X1 %0,%1\;cmpldi 0,%0,%3" + "ld%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + DImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -66,17 +65,17 @@ (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:DI 1 "non_update_memory_operand" "m") - (match_operand:DI 3 "const_m1_to_1_operand" "n"))) + (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "ld%X1 %0,%1\;cmpdi 0,%0,%3" + "ld%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + DImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -87,17 +86,17 @@ (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "m") - (match_operand:DI 3 "const_0_to_1_operand" "n"))) + (match_operand:DI 3 "const_0_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "ld%X1 %0,%1\;cmpldi 0,%0,%3" + "ld%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), DImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + DImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -108,17 +107,17 @@ (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_m1_to_1_operand" "n"))) + (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwa%X1 %0,%1\;cmpdi 0,%0,%3" + "lwa%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -129,17 +128,17 @@ (define_insn_and_split "*lwz_cmpldi_cr0_SI_clobber_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_0_to_1_operand" "n"))) + (match_operand:SI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwz%X1 %0,%1\;cmpldi 0,%0,%3" + "lwz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_D))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -150,17 +149,17 @@ (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_m1_to_1_operand" "n"))) + (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwa%X1 %0,%1\;cmpdi 0,%0,%3" + "lwa%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_DS))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -171,17 +170,17 @@ (define_insn_and_split "*lwz_cmpldi_cr0_SI_SI_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_0_to_1_operand" "n"))) + (match_operand:SI 3 "const_0_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwz%X1 %0,%1\;cmpldi 0,%0,%3" + "lwz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_D))" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -192,17 +191,17 @@ (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_m1_to_1_operand" "n"))) + (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwa%X1 %0,%1\;cmpdi 0,%0,%3" + "lwa%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_DS))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_DS))" [(set (match_dup 0) (sign_extend:EXTSI (match_dup 1))) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -213,17 +212,17 @@ (define_insn_and_split "*lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:SI 1 "non_update_memory_operand" "m") - (match_operand:SI 3 "const_0_to_1_operand" "n"))) + (match_operand:SI 3 "const_0_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (zero_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lwz%X1 %0,%1\;cmpldi 0,%0,%3" + "lwz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), SImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + SImode, NON_PREFIXED_D))" [(set (match_dup 0) (zero_extend:EXTSI (match_dup 1))) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -234,17 +233,17 @@ (define_insn_and_split "*lha_cmpdi_cr0_HI_clobber_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:HI 1 "non_update_memory_operand" "m") - (match_operand:HI 3 "const_m1_to_1_operand" "n"))) + (match_operand:HI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:GPR 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lha%X1 %0,%1\;cmpdi 0,%0,%3" + "lha%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), HImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + HImode, NON_PREFIXED_D))" [(set (match_dup 0) (sign_extend:GPR (match_dup 1))) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -255,17 +254,17 @@ (define_insn_and_split "*lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m") - (match_operand:HI 3 "const_0_to_1_operand" "n"))) + (match_operand:HI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:GPR 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lhz%X1 %0,%1\;cmpldi 0,%0,%3" + "lhz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), HImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + HImode, NON_PREFIXED_D))" [(set (match_dup 0) (zero_extend:GPR (match_dup 1))) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -276,17 +275,17 @@ (define_insn_and_split "*lha_cmpdi_cr0_HI_EXTHI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") (compare:CC (match_operand:HI 1 "non_update_memory_operand" "m") - (match_operand:HI 3 "const_m1_to_1_operand" "n"))) + (match_operand:HI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTHI 0 "gpc_reg_operand" "=r") (sign_extend:EXTHI (match_dup 1)))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lha%X1 %0,%1\;cmpdi 0,%0,%3" + "lha%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), HImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + HImode, NON_PREFIXED_D))" [(set (match_dup 0) (sign_extend:EXTHI (match_dup 1))) (set (match_dup 2) - (compare:CC (match_dup 0) - (match_dup 3)))] + (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -297,17 +296,17 @@ (define_insn_and_split "*lhz_cmpldi_cr0_HI_EXTHI_CCUNS_zero" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:HI 1 "non_update_memory_operand" "m") - (match_operand:HI 3 "const_0_to_1_operand" "n"))) + (match_operand:HI 3 "const_0_to_1_operand" "n"))) (set (match_operand:EXTHI 0 "gpc_reg_operand" "=r") (zero_extend:EXTHI (match_dup 1)))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lhz%X1 %0,%1\;cmpldi 0,%0,%3" + "lhz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), HImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + HImode, NON_PREFIXED_D))" [(set (match_dup 0) (zero_extend:EXTHI (match_dup 1))) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -318,17 +317,17 @@ (define_insn_and_split "*lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m") - (match_operand:QI 3 "const_0_to_1_operand" "n"))) + (match_operand:QI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:GPR 0 "=r"))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lbz%X1 %0,%1\;cmpldi 0,%0,%3" + "lbz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), QImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + QImode, NON_PREFIXED_D))" [(set (match_dup 0) (zero_extend:GPR (match_dup 1))) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") @@ -339,17 +338,17 @@ (define_insn_and_split "*lbz_cmpldi_cr0_QI_GPR_CCUNS_zero" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") (compare:CCUNS (match_operand:QI 1 "non_update_memory_operand" "m") - (match_operand:QI 3 "const_0_to_1_operand" "n"))) + (match_operand:QI 3 "const_0_to_1_operand" "n"))) (set (match_operand:GPR 0 "gpc_reg_operand" "=r") (zero_extend:GPR (match_dup 1)))] "(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)" - "lbz%X1 %0,%1\;cmpldi 0,%0,%3" + "lbz%X1 %0,%1\;cmpldi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) - || !address_is_non_pfx_d_or_x (XEXP (operands[1],0), QImode, NON_PREFIXED_D))" + || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), + QImode, NON_PREFIXED_D))" [(set (match_dup 0) (zero_extend:GPR (match_dup 1))) (set (match_dup 2) - (compare:CCUNS (match_dup 0) - (match_dup 3)))] + (compare:CCUNS (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "load") (set_attr "cost" "8") diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index 837af7ac123..1ea08a21a7c 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -234,6 +234,47 @@ EOF } } +sub gen_addadd +{ + + my ($kind, $vchr, $op, $mode, $pred, $constraint); + KIND: foreach $kind ('scalar','vector') { + if ( $kind eq 'vector' ) { + $vchr = "v"; + $op = "vaddudm"; + $mode = "VM"; + $pred = "altivec_register_operand"; + $constraint = "v"; + } else { + $vchr = ""; + $op = "add"; + $mode = "GPR"; + $pred = "gpc_reg_operand"; + $constraint = "r"; + } + my $insn = <<"EOF"; +;; add-add fusion pattern generated by gen_addadd +(define_insn "*fuse_${op}_${op}" + [(set (match_operand:${mode} 3 "altivec_register_operand" "=&v,0,1,v") + (add:${mode} + (add:${mode} (match_operand:VM 0 "altivec_register_operand" "v,v,v,v") + (match_operand:VM 1 "altivec_register_operand" "%v,v,v,v")) + (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))) + (clobber (match_scratch:VM 4 "=X,X,X,r"))] + "(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)" + "@ + vxor %3,%1,%0\;vxor %3,%3,%2 + vxor %0,%1,%0\;vxor %0,%0,%2 + vxor %1,%1,%0\;vxor %1,%1,%2 + vxor %4,%1,%0\;vxor %3,%4,%2" + [(set_attr "type" "logical") + (set_attr "cost" "6") + (set_attr "length" "8")]) +EOF + } + +} + gen_ld_cmpi_p10(); gen_2logical();