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* [gcc(refs/users/meissner/heads/work041)] Add TARGET_VSX to XXSPLTIW code.
@ 2021-03-13 20:47 Michael Meissner
  0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2021-03-13 20:47 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:295b6c64fc4d95a651146fc0dc84c7e809f55cc5

commit 295b6c64fc4d95a651146fc0dc84c7e809f55cc5
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Mar 13 15:47:04 2021 -0500

    Add TARGET_VSX to XXSPLTIW code.
    
    gcc/
    2021-03-12  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/altivec.md (xxspltiw_v4si): Add TARGET_VSX.
            (xxspltiw_v4sf): Likewise.

Diff:
---
 gcc/config/rs6000/altivec.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4779ddc9641..c6685509e3d 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -823,7 +823,7 @@
   [(set (match_operand:V4SI 0 "register_operand" "=v,wa,wa,wa")
 	(vec_duplicate:V4SI
 	 (match_operand:SI 1 "s32bit_cint_operand" "wB,O,wM,n")))]
- "TARGET_POWER10"
+ "TARGET_POWER10 && TARGET_VSX"
  "@
   vspltisw %0,%1
   xxspltib %x0,0
@@ -837,7 +837,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=wa,wa")
 	(vec_duplicate:V4SF
 	 (match_operand:SF 1 "const_double_operand" "j,F")))]
- "TARGET_POWER10"
+ "TARGET_POWER10 && TARGET_VSX"
 {
   if (operands[1] == CONST0_RTX (SFmode))
     return "xxspltib %x0,0";


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