public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/users/meissner/heads/work042)] Revert patches.
@ 2021-03-19 17:38 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2021-03-19 17:38 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2b059872c703949fd9b3ed10a482f8b3c4a10936
commit 2b059872c703949fd9b3ed10a482f8b3c4a10936
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 19 13:36:40 2021 -0400
Revert patches.
gcc/
2021-03-19 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (xxspltiw_v8hi): New insn.
* config/rs6000/rs6000.c (xxspltiw_constant_p): Add support for
V8HImode constants.
(output_vec_const_move): Add support for V8HImode constants.
(rs6000_expand_vector_init): Use VEC_DUPLICATE for identical
vector V8HI constants.
gcc/
2021-03-19 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (UNSPEC_XXSPLTIW): Delete.
(xxspltiw_v4sf): Rewrite to use VEC_DUPLICATE.
(xxspltiw_v4sf_inst): Delete.
* config/rs6000/rs6000.c (xxspltiw_constant_p): Add V4SFmode
support.
(output_vec_const_move): Add support for V4SFmode constants.
(rs6000_expand_vector_init): If we have XXSPLTIW, use
VEC_DUPLICATE to create a vector of SF constants that are all the
same.
2021-03-19 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* gcc.target/powerpc/vec-splati-runnable.c: Adjust insn counts.
gcc/testsuite/
2021-03-19 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* gcc.target/powerpc/vec-splati-runnable.c: Add missing abort
call.
2021-03-19 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (xxspltiw_v4si): Rewrite to use
vec_duplicate.
* config/rs6000/predicates.md (easy_vector_constant): Add support
for constants we can create with XXSPLTIW.
* config/rs6000/rs6000-protos.h (xxspltiw_constant_p): New
declaration.
* config/rs6000/rs6000.c (xxspltiw_constant_p): New function.
(xxspltib_constant_p): If we can generate XXSPLTIW don't return
true for generating XXSPLTIB and extend operations.
(output_vec_const_move): Add support for generating XXSPLTIW for
V4SI moves.
(rs6000_expand_vector_init): Add support for generating XXSPLTIW
for V4SI moves.
Diff:
---
gcc/config/rs6000/altivec.md | 71 +++++----------
gcc/config/rs6000/predicates.md | 4 -
gcc/config/rs6000/rs6000-protos.h | 1 -
gcc/config/rs6000/rs6000.c | 101 ---------------------
.../gcc.target/powerpc/vec-splati-runnable.c | 6 +-
5 files changed, 27 insertions(+), 156 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index e239104f249..e2e17fe90ea 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -176,6 +176,7 @@
UNSPEC_VSTRIL
UNSPEC_SLDB
UNSPEC_SRDB
+ UNSPEC_XXSPLTIW
UNSPEC_XXSPLTID
UNSPEC_XXSPLTI32DX
UNSPEC_XXBLEND
@@ -819,62 +820,36 @@
"vs<SLDB_lr>dbi %0,%1,%2,%3"
[(set_attr "type" "vecsimple")])
-;; Generate VSPLTIW, XXSPLITB, or XXSPLTIW to load up V4SI/V8HI/V4SF constants.
-(define_insn "*xxspltiw_v8hi"
- [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa,wa,v,wa")
- (vec_duplicate:V8HI
- (match_operand 1 "short_cint_operand" "O,wM,wB,n")))]
- "TARGET_POWER10"
-{
- int value = INTVAL (operands[1]);
-
- if (value == 0)
- return "xxspltib %x0,0";
-
- else if (value == -1)
- return "xxspltib %x0,255";
-
- int r = reg_or_subregno (operands[0]);
- if (IN_RANGE (value, -16, 15) && ALTIVEC_REGNO_P (r))
- return "vspltish %0,%1";
-
- int tmp = value & 0xffff;
- operands[2] = GEN_INT ((tmp << 16) | tmp);
- return "xxspltiw %x0,%2";
-}
- [(set_attr "type" "vecperm")
- (set_attr "prefixed" "*,*,*,yes")
- (set_attr "prefixed_prepend_p" "*,*,*,no")])
-
(define_insn "xxspltiw_v4si"
- [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa,v,wa")
- (vec_duplicate:V4SI
- (match_operand:SI 1 "s32bit_cint_operand" "O,wM,wB,n")))]
+ [(set (match_operand:V4SI 0 "register_operand" "=wa")
+ (unspec:V4SI [(match_operand:SI 1 "s32bit_cint_operand" "n")]
+ UNSPEC_XXSPLTIW))]
"TARGET_POWER10"
- "@
- xxspltib %x0,0
- xxspltib %x0,255
- vspltisw %0,%1
- xxspltiw %x0,%1"
+ "xxspltiw %x0,%1"
[(set_attr "type" "vecperm")
- (set_attr "prefixed" "*,*,*,yes")
- (set_attr "prefixed_prepend_p" "*,*,*,no")])
+ (set_attr "prefixed" "yes")
+ (set_attr "prefixed_prepend_p" "no")])
-(define_insn "xxspltiw_v4sf"
- [(set (match_operand:V4SF 0 "register_operand" "=wa,wa")
- (vec_duplicate:V4SF
- (match_operand:SF 1 "const_double_operand" "j,F")))]
+(define_expand "xxspltiw_v4sf"
+ [(set (match_operand:V4SF 0 "register_operand" "=wa")
+ (unspec:V4SF [(match_operand:SF 1 "const_double_operand" "n")]
+ UNSPEC_XXSPLTIW))]
"TARGET_POWER10"
{
- if (operands[1] == CONST0_RTX (SFmode))
- return "xxspltib %x0,0";
+ long long value = rs6000_const_f32_to_i32 (operands[1]);
+ emit_insn (gen_xxspltiw_v4sf_inst (operands[0], GEN_INT (value)));
+ DONE;
+})
- operands[2] = GEN_INT (rs6000_const_f32_to_i32 (operands[1]));
- return "xxspltiw %x0,%2";
-}
+(define_insn "xxspltiw_v4sf_inst"
+ [(set (match_operand:V4SF 0 "register_operand" "=wa")
+ (unspec:V4SF [(match_operand:SI 1 "c32bit_cint_operand" "n")]
+ UNSPEC_XXSPLTIW))]
+ "TARGET_POWER10"
+ "xxspltiw %x0,%1"
[(set_attr "type" "vecperm")
- (set_attr "prefixed" "*,yes")
- (set_attr "prefixed_prepend_p" "*,no")])
+ (set_attr "prefixed" "yes")
+ (set_attr "prefixed_prepend_p" "no")])
(define_expand "xxspltidp_v2df"
[(set (match_operand:V2DF 0 "register_operand" )
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 0c5d7a096f3..859af75dfbd 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -649,14 +649,10 @@
{
int value = 256;
int num_insns = -1;
- rtx constant;
if (zero_constant (op, mode) || all_ones_constant (op, mode))
return true;
- if (TARGET_POWER10 && xxspltiw_constant_p (op, mode, &constant))
- return true;
-
if (TARGET_P9_VECTOR
&& xxspltib_constant_p (op, mode, &num_insns, &value))
return true;
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 46a7d7f7de9..52436fc1637 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -32,7 +32,6 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, int, int, int,
extern bool easy_altivec_constant (rtx, machine_mode);
extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *);
-extern bool xxspltiw_constant_p (rtx, machine_mode, rtx *);
extern int vspltis_shifted (rtx);
extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 209f3c786fd..f3ee3a7ea22 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6320,51 +6320,6 @@ gen_easy_altivec_constant (rtx op)
gcc_unreachable ();
}
-/* Return true if OP is of the given MODE and can be generated with the ISA 3.1
- XXSPLTIW instruction. Return the SImode/SFmode/DFmode constant via the
- pointer CONSTANT_PTR. */
-
-bool
-xxspltiw_constant_p (rtx op, machine_mode mode, rtx *constant_ptr)
-{
- *constant_ptr = NULL_RTX;
-
- if (!TARGET_POWER10)
- return false;
-
- if (mode == VOIDmode)
- mode = GET_MODE (op);
-
- else if (mode != GET_MODE (op))
- return false;
-
- if (mode != V4SImode && mode != V4SFmode && mode != V8HImode)
- return false;
-
- rtx element;
-
- /* Handle (vec_duplicate <constant>). */
- if (GET_CODE (op) == VEC_DUPLICATE)
- element = XEXP (op, 0);
-
- /* Handle (const_vector [...]). */
- else if (GET_CODE (op) == CONST_VECTOR)
- {
- size_t nunits = GET_MODE_NUNITS (mode);
- element = CONST_VECTOR_ELT (op, 0);
-
- for (size_t i = 1; i < nunits; i++)
- if (!rtx_equal_p (element, CONST_VECTOR_ELT (op, i)))
- return false;
- }
-
- else
- return false;
-
- *constant_ptr = element;
- return true;
-}
-
/* Return true if OP is of the given MODE and can be synthesized with ISA 3.0
instructions (xxspltib, vupkhsb/vextsb2w/vextb2d).
@@ -6397,12 +6352,6 @@ xxspltib_constant_p (rtx op,
else if (mode != GET_MODE (op) && GET_MODE (op) != VOIDmode)
return false;
- /* If we can handle the constant directly with XXSPLTIW, don't both using
- XXSPLTIB and vector extend. */
- rtx constant;
- if (xxspltiw_constant_p (op, mode, &constant))
- return false;
-
/* Handle (vec_duplicate <constant>). */
if (GET_CODE (op) == VEC_DUPLICATE)
{
@@ -6497,7 +6446,6 @@ output_vec_const_move (rtx *operands)
int shift;
machine_mode mode;
rtx dest, vec;
- rtx element;
dest = operands[0];
vec = operands[1];
@@ -6536,46 +6484,6 @@ output_vec_const_move (rtx *operands)
gcc_unreachable ();
}
- /* See if we can generate a XXSPLTIW directly. */
- if (TARGET_POWER10 && xxspltiw_constant_p (vec, mode, &element))
- {
- if (CONST_INT_P (element))
- operands[2] = element;
- else if (CONST_DOUBLE_P (element))
- operands[2] = GEN_INT (rs6000_const_f32_to_i32 (element));
- else
- gcc_unreachable ();
-
- HOST_WIDE_INT value = INTVAL (operands[2]);
- HOST_WIDE_INT tmp;
- switch (mode)
- {
- case E_V16QImode:
- operands[2] = GEN_INT (value & 0xff);
- return "xxspltib %x0,%2";
-
- case E_V8HImode:
- if (IN_RANGE (value, -16, 15) && dest_vmx_p)
- return "vspltish %0,%2";
-
- tmp = value & 0xffff;
- operands[2] = GEN_INT ((tmp << 16) | tmp);
- return "xxspltiw %x0,%2";
-
- case E_V4SImode:
- if (IN_RANGE (value, -16, 15) && dest_vmx_p)
- return "vspltisw %0,%2";
-
- return "xxspltiw %x0,%2";
-
- case E_V4SFmode:
- return "xxspltiw %x0,%2";
-
- default:
- break;
- }
- }
-
if (TARGET_P9_VECTOR
&& xxspltib_constant_p (vec, mode, &num_insns, &xxspltib_value))
{
@@ -6657,15 +6565,6 @@ rs6000_expand_vector_init (rtx target, rtx vals)
if (n_var == 0)
{
- /* Generate XXSPLTIW if we can. */
- if (TARGET_POWER10 && all_same
- && (mode == V4SImode || mode == V4SFmode || mode == V8HImode))
- {
- rtx dup = gen_rtx_VEC_DUPLICATE (mode, XVECEXP (vals, 0, 0));
- emit_insn (gen_rtx_SET (target, dup));
- return;
- }
-
rtx const_vec = gen_rtx_CONST_VECTOR (mode, XVEC (vals, 0));
bool int_vector_p = (GET_MODE_CLASS (mode) == MODE_VECTOR_INT);
if ((int_vector_p || TARGET_VSX) && all_const_zero)
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c
index ef61a915337..e84ce77a21d 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c
@@ -101,7 +101,7 @@ main (int argc, char *argv [])
printf(" vresult_d[%i] = %e, expected_vresult_d[%i] = %e\n",
i, vresult_d[i], i, expected_vresult_d[i]);
#else
- abort();
+ ;
#endif
}
@@ -160,6 +160,8 @@ main (int argc, char *argv [])
return 0;
}
-/* { dg-final { scan-assembler-times {\mxxspltiw|vspltisw\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxspltiw\M} 2 } } */
/* { dg-final { scan-assembler-times {\mxxspltidp\M} 2 } } */
/* { dg-final { scan-assembler-times {\mxxsplti32dx\M} 3 } } */
+
+
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2021-03-19 17:38 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-19 17:38 [gcc(refs/users/meissner/heads/work042)] Revert patches Michael Meissner
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).