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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work042)] Use VEC_DUPLICATE for V4SF duplicate constants. Date: Fri, 19 Mar 2021 17:46:30 +0000 (GMT) [thread overview] Message-ID: <20210319174630.719CD385783D@sourceware.org> (raw) https://gcc.gnu.org/g:569f389f022a47010f7e527b5f5ac0fde7cf0b6b commit 569f389f022a47010f7e527b5f5ac0fde7cf0b6b Author: Michael Meissner <meissner@linux.ibm.com> Date: Fri Mar 19 13:46:02 2021 -0400 Use VEC_DUPLICATE for V4SF duplicate constants. This code rewrites the handling for the __builtin_vec_xxspltiw builtin in handling V4SF constants to use VEC_DUPLICATE instead of an UNSPEC. gcc/ 2021-03-19 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/altivec.md (UNSPEC_XXSPLTIW): Delete. (xxspltiw_v4sf): Rewrite to use VEC_DUPLICATE. (xxspltiw_v4sf_inst): Delete. * config/rs6000/rs6000.c (xxspltiw_constant_p): Add V4SFmode support. (output_vec_const_move): Add support for V4SFmode constants. (rs6000_expand_vector_init): If we have XXSPLTIW, use VEC_DUPLICATE to create a vector of SF constants that are all the same. Diff: --- gcc/config/rs6000/altivec.md | 28 +++++++++++----------------- gcc/config/rs6000/rs6000.c | 8 +++++--- 2 files changed, 16 insertions(+), 20 deletions(-) diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index ec071bbd0a4..2fb22172bec 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -176,7 +176,6 @@ UNSPEC_VSTRIL UNSPEC_SLDB UNSPEC_SRDB - UNSPEC_XXSPLTIW UNSPEC_XXSPLTID UNSPEC_XXSPLTI32DX UNSPEC_XXBLEND @@ -835,26 +834,21 @@ (set_attr "prefixed" "*,*,*,yes") (set_attr "prefixed_prepend_p" "*,*,*,no")]) -(define_expand "xxspltiw_v4sf" - [(set (match_operand:V4SF 0 "register_operand" "=wa") - (unspec:V4SF [(match_operand:SF 1 "const_double_operand" "n")] - UNSPEC_XXSPLTIW))] +(define_insn "xxspltiw_v4sf" + [(set (match_operand:V4SF 0 "register_operand" "=wa,wa") + (vec_duplicate:V4SF + (match_operand:SF 1 "const_double_operand" "j,F")))] "TARGET_POWER10" { - long long value = rs6000_const_f32_to_i32 (operands[1]); - emit_insn (gen_xxspltiw_v4sf_inst (operands[0], GEN_INT (value))); - DONE; -}) + if (operands[1] == CONST0_RTX (SFmode)) + return "xxspltib %x0,0"; -(define_insn "xxspltiw_v4sf_inst" - [(set (match_operand:V4SF 0 "register_operand" "=wa") - (unspec:V4SF [(match_operand:SI 1 "c32bit_cint_operand" "n")] - UNSPEC_XXSPLTIW))] - "TARGET_POWER10" - "xxspltiw %x0,%1" + operands[2] = GEN_INT (rs6000_const_f32_to_i32 (operands[1])); + return "xxspltiw %x0,%2"; +} [(set_attr "type" "vecperm") - (set_attr "prefixed" "yes") - (set_attr "prefixed_prepend_p" "no")]) + (set_attr "prefixed" "*,yes") + (set_attr "prefixed_prepend_p" "*,no")]) (define_expand "xxspltidp_v2df" [(set (match_operand:V2DF 0 "register_operand" ) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 63525e764cf..af46a00e139 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6338,7 +6338,7 @@ xxspltiw_constant_p (rtx op, machine_mode mode, rtx *constant_ptr) else if (mode != GET_MODE (op)) return false; - if (mode != V4SImode) + if (mode != V4SImode && mode != V4SFmode) return false; rtx element; @@ -6541,11 +6541,13 @@ output_vec_const_move (rtx *operands) { if (CONST_INT_P (element)) operands[2] = element; + else if (CONST_DOUBLE_P (element)) + operands[2] = GEN_INT (rs6000_const_f32_to_i32 (element)); else gcc_unreachable (); HOST_WIDE_INT value = INTVAL (operands[2]); - if (IN_RANGE (value, -16, 15) && dest_vmx_p) + if (IN_RANGE (value, -16, 15) && dest_vmx_p && mode == V4SImode) return "vspltisw %0,%2"; else @@ -6634,7 +6636,7 @@ rs6000_expand_vector_init (rtx target, rtx vals) if (n_var == 0) { /* Generate XXSPLTIW if we can. */ - if (TARGET_POWER10 && all_same && mode == V4SImode) + if (TARGET_POWER10 && all_same && (mode == V4SImode || mode == V4SFmode)) { rtx dup = gen_rtx_VEC_DUPLICATE (mode, XVECEXP (vals, 0, 0)); emit_insn (gen_rtx_SET (target, dup));
next reply other threads:[~2021-03-19 17:46 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-19 17:46 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2021-03-19 17:01 Michael Meissner
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