[gcc r11-7794] testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed.

[gcc r11-7794] testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed.

[Christophe Lyon]

https://gcc.gnu.org/g:fcfad74515da38bf73d67e2eb76e81a3cd862340

commit r11-7794-gfcfad74515da38bf73d67e2eb76e81a3cd862340
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Mon Apr 20 22:37:23 2020 +0000

    testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed.
    
    Several tests override the -mfloat-abi option detected by their
    effective targets. Make sure it is supported, so that these tests are
    unsupported rather than failures (the inclusion of arm_neon.h
    otherwise fails for lack of gnu/stubs-*.h)
    
    This avoids failures with
    bfloat16_simd_2_1.c
    bfloat16_simd_3_1.c
    bf16_vldn_1.c
    bf16_vstn_1.c on arm-linux-gnueabi
    and
    pr51968.c
    bfloat16_simd_1_2.c
    bfloat16_simd_2_2.c
    bfloat16_simd_3_2.c on arm-linux-gnueabihf.
    
    On arm-eabi with default cpu/fpu/mode and a+rm multilibs,
    bfloat16_simd_2_1.c, bfloat16_simd_3_1.c, bf16_vstn_1.c and
    bf16_vldn_1.c become unsupported instead of pass because arm_hard_ok
    fails with "selected processor lacks an FPU". Since we also override
    the fpu in dg-additional-options, we'd need another effective target
    (say arm_hard_neon_ok) that would check -mfloat-abi=hard -mfpu=neon at
    the same time. But we have already so many arm effective targets, it
    doesn't seem like a good way forward.
    
    2021-03-19  Christophe Lyon  <christophe.lyon@linaro.org>
    
            gcc/testsuite/
            * gcc.target/arm/bfloat16_simd_1_2.c: Add arm_softfp_ok.
            * gcc.target/arm/bfloat16_simd_2_2.c: Likewise.
            * gcc.target/arm/bfloat16_simd_3_2.c: Likewise.
            * gcc.target/arm/pr51968.c: Likewise.
            * gcc.target/arm/bfloat16_simd_2_1.c: arm_hard_ok.
            * gcc.target/arm/bfloat16_simd_3_1.c: Likewise.
            * gcc.target/arm/simd/bf16_vldn_1.c: Likewise.
            * gcc.target/arm/simd/bf16_vstn_1.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 1 +
 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 1 +
 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 1 +
 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 1 +
 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 1 +
 gcc/testsuite/gcc.target/arm/pr51968.c           | 3 ++-
 gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c  | 1 +
 gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c  | 1 +
 8 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
index 4ffcc54de5e..95eecec2d09 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
index 05ee4d878ec..02b4c416df6 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
index 15fba316d35..175bfa5c227 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
index b9b7606d035..d2326c2daf5 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
index ab1fe101af4..346253b8a47 100644
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c b/gcc/testsuite/gcc.target/arm/pr51968.c
index 781470223db..c06da486316 100644
--- a/gcc/testsuite/gcc.target/arm/pr51968.c
+++ b/gcc/testsuite/gcc.target/arm/pr51968.c
@@ -1,7 +1,8 @@
 /* PR target/51968 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
 #include <arm_neon.h>
 
 struct T { int8x8x2_t val; };
diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
index 663e76984c3..4d916149ac3 100644
--- a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
 /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" }  */
diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
index 2657b6f7cc4..5c6cdd5e43e 100644
--- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
 /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" }  */