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* [gcc(refs/users/meissner/heads/work043)] Make XXSPLTI instructions use vecperm type.
@ 2021-03-30 18:32 Michael Meissner
  0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2021-03-30 18:32 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:6a96cdc41407ea569b673d7581a0570eb55599f5

commit 6a96cdc41407ea569b673d7581a0570eb55599f5
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Mar 30 14:32:18 2021 -0400

    Make XXSPLTI instructions use vecperm type.
    
    Pat Haugen has said he thinks the XXSPLTI instructions should use the
    vecperm instruction type instead of vecsimple.  This patch changes the
    code to use vecperm.
    
    gcc/
    2021-03-30  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/altivec.md (xxspltiw_v4si): Use vecperm
            attribute.
            (xxspltiw_v4sf_inst): Use vecperm attribute.
            (xxspltidp_v2df_inst): Use vecperm attribute.
            (xxsplti32dx_v4si_inst): Use vecperm attribute.
            (xxsplti32dx_v4sf_inst): Use vecperm attribute.

Diff:
---
 gcc/config/rs6000/altivec.md | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4799560e2c3..e2e17fe90ea 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -826,7 +826,7 @@
 		     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")
   (set_attr "prefixed_prepend_p" "no")])
 
@@ -847,7 +847,7 @@
 		     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")
   (set_attr "prefixed_prepend_p" "no")])
 
@@ -868,7 +868,7 @@
 		     UNSPEC_XXSPLTID))]
   "TARGET_POWER10"
   "xxspltidp %x0,%1"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")
   (set_attr "prefixed_prepend_p" "no")])
 
@@ -889,7 +889,7 @@
 					 GEN_INT (index), operands[3]));
    DONE;
 }
- [(set_attr "type" "vecsimple")])
+ [(set_attr "type" "vecperm")])
 
 (define_insn "xxsplti32dx_v4si_inst"
   [(set (match_operand:V4SI 0 "register_operand" "=wa")
@@ -899,7 +899,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")
    (set_attr "prefixed_prepend_p" "no")])
 
@@ -929,7 +929,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")
    (set_attr "prefixed_prepend_p" "no")])


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