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* [gcc(refs/users/meissner/heads/work043)] Revert patch.
@ 2021-03-31 20:27 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2021-03-31 20:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:52bcd74aad5b05ebaa54c43b4cd7a7bec8e68aa5
commit 52bcd74aad5b05ebaa54c43b4cd7a7bec8e68aa5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 31 16:26:45 2021 -0400
Revert patch.
gcc/
2021-03-31 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (xxspltiw_v8hi): Add support for
-mno-xxspltiw.
(xxspltiw_v4si): Add support for -mno-xxspltiw.
(xxspltiw_v4sf): Add support for -mno-xxspltiw.
* config/rs6000/predicates.md (xxspltidp_operand): Add support for
-mno-xxspltidp.
* config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Add
support for -mno-xxspltiw and -mno-xxspltidp.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
support for -mno-xxspltiw and -mno-xxspltidp.
(xxspltiw_constant_p): Add support for -mno-xxspltiw.
(rs6000_expand_vector_init): Add support for -mno-xxspltiw and
-mno-xxspltidp.
(rs6000_opt_masks): Add support for -mno-xxspltiw and
-mno-xxspltidp.
* config/rs6000/rs6000.md (mov{sf,df} splitter for XXSPLTIDP): Add
support for -mno-xxspltidp.
(xxspltidp<mode>): Add support for -mno-xxspltidp.
* config/rs6000/rs6000.opt (-mxxspltiw): Add support for
-mno-xxspltiw.
(-mxxspltiwdp): Add support for -mno-xxspltidp.
Diff:
---
gcc/config/rs6000/altivec.md | 6 +++---
gcc/config/rs6000/predicates.md | 2 +-
gcc/config/rs6000/rs6000-cpus.def | 4 +---
gcc/config/rs6000/rs6000.c | 19 +++++--------------
gcc/config/rs6000/rs6000.md | 4 ++--
gcc/config/rs6000/rs6000.opt | 8 --------
6 files changed, 12 insertions(+), 31 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 129578a9e89..b108b7a688a 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -822,7 +822,7 @@
[(set (match_operand:V8HI 0 "vsx_register_operand" "=wa,wa,v,wa")
(vec_duplicate:V8HI
(match_operand 1 "short_cint_operand" "O,wM,wB,n")))]
- "TARGET_XXSPLTIW"
+ "TARGET_POWER10"
{
int value = INTVAL (operands[1]);
@@ -848,7 +848,7 @@
[(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa,v,wa")
(vec_duplicate:V4SI
(match_operand:SI 1 "s32bit_cint_operand" "O,wM,wB,n")))]
- "TARGET_XXSPLTIW"
+ "TARGET_POWER10"
"@
xxspltib %x0,0
xxspltib %x0,255
@@ -862,7 +862,7 @@
[(set (match_operand:V4SF 0 "register_operand" "=wa,wa")
(vec_duplicate:V4SF
(match_operand:SF 1 "const_double_operand" "j,F")))]
- "TARGET_XXSPLTIW"
+ "TARGET_POWER10"
{
if (operands[1] == CONST0_RTX (SFmode))
return "xxspltib %x0,0";
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index fe97d5c1d0c..b5b17a8b7c6 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -576,7 +576,7 @@
long value;
rtx element;
- if (!TARGET_XXSPLTIDP)
+ if (!TARGET_POWER10 || !TARGET_VSX)
return 0;
if (mode == V2DFmode)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 559aee29e89..cbbb42c1b3a 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -85,9 +85,7 @@
| OTHER_POWER10_MASKS \
| OPTION_MASK_P10_FUSION \
| OPTION_MASK_P10_FUSION_LD_CMPI \
- | OPTION_MASK_P10_FUSION_2LOGICAL \
- | OPTION_MASK_XXSPLTIW \
- | OPTION_MASK_XXSPLTIDP)
+ | OPTION_MASK_P10_FUSION_2LOGICAL)
/* Flags that need to be turned off if -mno-power9-vector. */
#define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 5265b9a336f..a076c4e67dc 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -4507,15 +4507,8 @@ rs6000_option_override_internal (bool global_init_p)
(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LD_CMPI) == 0)
rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LD_CMPI;
- if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_XXSPLTIW) == 0)
- rs6000_isa_flags |= OPTION_MASK_XXSPLTIW;
-
- if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_XXSPLTIDP) == 0)
- rs6000_isa_flags |= OPTION_MASK_XXSPLTIDP;
-
- if (TARGET_POWER10 &&
- (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LD_CMPI) == 0)
- rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LD_CMPI;
+ if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2LOGICAL) == 0)
+ rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2LOGICAL;
/* Turn off vector pair/mma options on non-power10 systems. */
else if (!TARGET_POWER10 && TARGET_MMA)
@@ -6406,7 +6399,7 @@ xxspltiw_constant_p (rtx op, machine_mode mode, rtx *constant_ptr)
{
*constant_ptr = NULL_RTX;
- if (!TARGET_XXSPLTIW)
+ if (!TARGET_POWER10)
return false;
if (mode == VOIDmode)
@@ -6740,7 +6733,7 @@ rs6000_expand_vector_init (rtx target, rtx vals)
if (n_var == 0)
{
/* Generate XXSPLTIW if we can. */
- if (TARGET_XXSPLTIW && all_same
+ if (TARGET_POWER10 && all_same
&& (mode == V4SImode || mode == V4SFmode || mode == V8HImode))
{
rtx dup = gen_rtx_VEC_DUPLICATE (mode, XVECEXP (vals, 0, 0));
@@ -6749,7 +6742,7 @@ rs6000_expand_vector_init (rtx target, rtx vals)
}
/* Generate XXSPLTIDP if we can. */
- if (TARGET_XXSPLTIDP && all_same && mode == V2DFmode
+ if (TARGET_POWER10 && all_same && mode == V2DFmode
&& xxspltidp_operand (XVECEXP (vals, 0, 0), DFmode))
{
rtx dup = gen_rtx_VEC_DUPLICATE (mode, XVECEXP (vals, 0, 0));
@@ -24097,8 +24090,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "string", 0, false, true },
{ "update", OPTION_MASK_NO_UPDATE, true , true },
{ "vsx", OPTION_MASK_VSX, false, true },
- { "xxspltiw", OPTION_MASK_XXSPLTIW, false, true },
- { "xxspltidp", OPTION_MASK_XXSPLTIDP, false, true },
#ifdef OPTION_MASK_64BIT
#if TARGET_AIX_OS
{ "aix64", OPTION_MASK_64BIT, false, false },
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 109ef05ad65..960d1913d9b 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7536,7 +7536,7 @@
(define_split
[(set (match_operand:SFDF 0 "vsx_register_operand")
(match_operand:SFDF 1 "xxspltidp_operand"))]
- "TARGET_XXSPLTIDP && operands[1] != CONST0_RTX (<MODE>mode)"
+ "TARGET_POWER10 && TARGET_VSX && operands[1] != CONST0_RTX (<MODE>mode)"
[(set (match_dup 0)
(unspec:SFDF [(match_dup 2)] UNSPEC_XXSPLTID))]
{
@@ -7550,7 +7550,7 @@
[(set (match_operand:SFDF 0 "vsx_register_operand" "=wa")
(unspec:SFDF [(match_operand 1 "const_int_operand" "n")]
UNSPEC_XXSPLTID))]
- "TARGET_XXSPLTIDP"
+ "TARGET_POWER10 && TARGET_VSX"
"xxspltidp %x0,%1"
[(set_attr "type" "vecperm")
(set_attr "prefixed" "yes")
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 2638dc45937..1fb2c35c1b3 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -626,11 +626,3 @@ Generate (do not generate) MMA instructions.
mrelative-jumptables
Target Undocumented Var(rs6000_relative_jumptables) Init(1) Save
-
-mxxspltiw
-Target Undocumented Mask(XXSPLTIW) Var(rs6000_isa_flags)
-Generate (do not generate) XXSPLTIW instructions
-
-mxxspltidp
-Target Undocumented Mask(XXSPLTIDP) Var(rs6000_isa_flags)
-Generate (do not generate) XXSPLTIDP instructions
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/meissner/heads/work043)] Revert patch.
@ 2021-03-31 18:59 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2021-03-31 18:59 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:de661d6352af3e2aee827a7a56c8770b597845a5
commit de661d6352af3e2aee827a7a56c8770b597845a5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 31 14:58:12 2021 -0400
Revert patch.
gcc/
2021-03-31 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (xxspltiw_v8hi): Fix spacing.
gcc/
2021-03-30 Michael Meissner <meissner@linux.ibm.com>
Revert patch.
* config/rs6000/altivec.md (xxspltiw_v8hi): New insn.
* config/rs6000/rs6000.c (xxspltiw_constant_p): Add support for
V8HImode constants.
(output_vec_const_move): Add support for V8HImode constants.
(rs6000_expand_vector_init): Use VEC_DUPLICATE for identical
vector V8HI constants.
Diff:
---
gcc/config/rs6000/altivec.md | 28 +-------------------------
gcc/config/rs6000/rs6000.c | 48 +++++++++-----------------------------------
2 files changed, 11 insertions(+), 65 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index b108b7a688a..939ae5d0d84 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -817,33 +817,7 @@
"vs<SLDB_lr>dbi %0,%1,%2,%3"
[(set_attr "type" "vecsimple")])
-;; Generate VSPLTIW, XXSPLITB, or XXSPLTIW to load up V4SI/V8HI/V4SF constants.
-(define_insn "*xxspltiw_v8hi"
- [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa,wa,v,wa")
- (vec_duplicate:V8HI
- (match_operand 1 "short_cint_operand" "O,wM,wB,n")))]
- "TARGET_POWER10"
-{
- int value = INTVAL (operands[1]);
-
- if (value == 0)
- return "xxspltib %x0,0";
-
- else if (value == -1)
- return "xxspltib %x0,255";
-
- int r = reg_or_subregno (operands[0]);
- if (IN_RANGE (value, -16, 15) && ALTIVEC_REGNO_P (r))
- return "vspltish %0,%1";
-
- int tmp = value & 0xffff;
- operands[2] = GEN_INT ((tmp << 16) | tmp);
- return "xxspltiw %x0,%2";
-}
- [(set_attr "type" "vecperm")
- (set_attr "prefixed" "*,*,*,yes")
- (set_attr "prefixed_prepend_p" "*,*,*,no")])
-
+;; Generate VSPLTIW, XXSPLITB, or XXSPLTIW to load up V4SI constants.
(define_insn "xxspltiw_v4si"
[(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa,v,wa")
(vec_duplicate:V4SI
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a076c4e67dc..eb7356a871a 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6408,7 +6408,7 @@ xxspltiw_constant_p (rtx op, machine_mode mode, rtx *constant_ptr)
else if (mode != GET_MODE (op))
return false;
- if (mode != V4SImode && mode != V4SFmode && mode != V8HImode)
+ if (mode != V4SImode && mode != V4SFmode)
return false;
rtx element;
@@ -6606,49 +6606,22 @@ output_vec_const_move (rtx *operands)
gcc_unreachable ();
}
- /* See if we can use the ISA 3.1 XXSPLTIW instruction. Generate the
- shorter VSPLTISH/VSPLTISW if possible. */
+ /* See if we can generate a XXSPLTIW directly. */
if (TARGET_POWER10 && xxspltiw_constant_p (vec, mode, &element))
{
- HOST_WIDE_INT value, tmp;
-
if (CONST_INT_P (element))
- value = INTVAL (element);
+ operands[2] = element;
else if (CONST_DOUBLE_P (element))
- value = rs6000_const_f32_to_i32 (element);
+ operands[2] = GEN_INT (rs6000_const_f32_to_i32 (element));
else
gcc_unreachable ();
- switch (mode)
- {
- case E_V8HImode:
- if (IN_RANGE (value, -16, 15) && dest_vmx_p)
- {
- operands[2] = GEN_INT (value);
- return "vspltish %0,%2";
- }
-
- tmp = value & 0xffff;
- operands[2] = GEN_INT ((tmp << 16) | tmp);
- return "xxspltiw %x0,%2";
-
- case E_V4SImode:
- if (IN_RANGE (value, -16, 15) && dest_vmx_p)
- {
- operands[2] = GEN_INT (value);
- return "vspltisw %0,%2";
- }
-
- operands[2] = GEN_INT (value & 0xffffffff);
- return "xxspltiw %x0,%2";
-
- case E_V4SFmode:
- operands[2] = GEN_INT (value & 0xffffffff);
- return "xxspltiw %x0,%2";
+ HOST_WIDE_INT value = INTVAL (operands[2]);
+ if (IN_RANGE (value, -16, 15) && dest_vmx_p && mode == V4SImode)
+ return "vspltisw %0,%2";
- default:
- break;
- }
+ else
+ return "xxspltiw %x0,%2";
}
if (TARGET_P9_VECTOR
@@ -6733,8 +6706,7 @@ rs6000_expand_vector_init (rtx target, rtx vals)
if (n_var == 0)
{
/* Generate XXSPLTIW if we can. */
- if (TARGET_POWER10 && all_same
- && (mode == V4SImode || mode == V4SFmode || mode == V8HImode))
+ if (TARGET_POWER10 && all_same && (mode == V4SImode || mode == V4SFmode))
{
rtx dup = gen_rtx_VEC_DUPLICATE (mode, XVECEXP (vals, 0, 0));
emit_insn (gen_rtx_SET (target, dup));
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/meissner/heads/work043)] Revert patch.
@ 2021-03-30 20:48 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2021-03-30 20:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:817f76dc0ef1154c75941856244e6ecdc524285f
commit 817f76dc0ef1154c75941856244e6ecdc524285f
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Mar 30 16:48:03 2021 -0400
Revert patch.
libgcc/
2021-03-30 Michael Meissner <meissner@linux.ibm.com>
Revert.
* config/rs6000/ibm-ldouble.c (pack_ldouble): Use
__builtin_pack_ibm128 instead of __builtin_pack_longdouble.
Diff:
---
libgcc/config/rs6000/ibm-ldouble.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/libgcc/config/rs6000/ibm-ldouble.c b/libgcc/config/rs6000/ibm-ldouble.c
index 92b4b4c583d..4c13453f975 100644
--- a/libgcc/config/rs6000/ibm-ldouble.c
+++ b/libgcc/config/rs6000/ibm-ldouble.c
@@ -102,9 +102,9 @@ __asm__ (".symver __gcc_qadd,_xlqadd@GCC_3.4\n\t"
static inline IBM128_TYPE
pack_ldouble (double dh, double dl)
{
-#if defined (__LONG_DOUBLE_128__) \
+#if defined (__LONG_DOUBLE_128__) && defined (__LONG_DOUBLE_IBM128__) \
&& !(defined (_SOFT_FLOAT) || defined (__NO_FPRS__))
- return __builtin_pack_ibm128 (dh, dl);
+ return __builtin_pack_longdouble (dh, dl);
#else
union
{
^ permalink raw reply [flat|nested] 3+ messages in thread
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