[gcc(refs/users/meissner/heads/work044)] Switch power10 XXSPLTIW built-ins to use VEC_DUPLICATE.

[gcc(refs/users/meissner/heads/work044)] Switch power10 XXSPLTIW built-ins to use VEC_DUPLICATE.

[Michael Meissner]

https://gcc.gnu.org/g:a67dde6a82f9277d6fb4d4abd841c92028b17568

commit a67dde6a82f9277d6fb4d4abd841c92028b17568
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Apr 2 13:55:23 2021 -0400

    Switch power10 XXSPLTIW built-ins to use VEC_DUPLICATE.
    
    This patch switches the power10 vec_splati and vec_splatid built-in
    functions to use the XXSPLTIB support instead of using UNSPECs.
    
    gcc/
    2021-04-02  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/altivec.md (UNSPEC_XXSPLTIW): Delete.
            (xxspltiw_v4si): Rewrite to use VEC_DUPLICATE.
            (xxspltiw_v4sf): Rewrite to use VEC_DUPLICATE.
            (xxspltiw_v4sf_inst): Delete.

Diff:
---
 gcc/config/rs6000/altivec.md | 48 ++++++++++++++++++++------------------------
 1 file changed, 22 insertions(+), 26 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 1351dafbc41..65148b0986c 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -176,7 +176,6 @@
    UNSPEC_VSTRIL
    UNSPEC_SLDB
    UNSPEC_SRDB
-   UNSPEC_XXSPLTIW
    UNSPEC_XXSPLTID
    UNSPEC_XXSPLTI32DX
    UNSPEC_XXBLEND
@@ -821,33 +820,30 @@
   [(set_attr "type" "vecsimple")])
 
 (define_insn "xxspltiw_v4si"
-  [(set (match_operand:V4SI 0 "register_operand" "=wa")
-	(unspec:V4SI [(match_operand:SI 1 "s32bit_cint_operand" "n")]
-		     UNSPEC_XXSPLTIW))]
- "TARGET_POWER10"
- "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
-  (set_attr "prefixed" "yes")])
-
-(define_expand "xxspltiw_v4sf"
-  [(set (match_operand:V4SF 0 "register_operand" "=wa")
-	(unspec:V4SF [(match_operand:SF 1 "const_double_operand" "n")]
-		     UNSPEC_XXSPLTIW))]
- "TARGET_POWER10"
+  [(set (match_operand:V4SI 0 "register_operand" "=wa,wa,v,wa")
+	(vec_duplicate:V4SI
+	 (match_operand 1 "s32bit_cint_operand" "O,wM,wB,n")))]
+ "TARGET_XXSPLTIW"
+ "@
+  xxspltisb %x0,0
+  xxspltisb %x0,255
+  vspltisw %0,%1
+  xxspltiw %x0,%1"
+ [(set_attr "type" "vecperm")
+  (set_attr "prefixed" "*,*,*,yes")])
+
+(define_insn "xxspltiw_v4sf"
+  [(set (match_operand:V4SF 0 "register_operand" "=wa,wa")
+	(vec_duplicate:V4SF
+	 (match_operand:SF 1 "const_double_operand" "F,F")))]
+  "TARGET_XXSPLTIW"
 {
-  long long value = rs6000_const_f32_to_i32 (operands[1]);
-  emit_insn (gen_xxspltiw_v4sf_inst (operands[0], GEN_INT (value)));
-  DONE;
-})
+  if (operands[1] == CONST0_RTX (SFmode))
+    return "xxspltib %x0,0";
 
-(define_insn "xxspltiw_v4sf_inst"
-  [(set (match_operand:V4SF 0 "register_operand" "=wa")
-	(unspec:V4SF [(match_operand:SI 1 "c32bit_cint_operand" "n")]
-		     UNSPEC_XXSPLTIW))]
- "TARGET_POWER10"
- "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
-  (set_attr "prefixed" "yes")])
+  operands[2] = GEN_INT (rs6000_const_f32_to_i32 (operands[1]));
+  return "xxspltiw %x0,%2";
+})
 
 (define_expand "xxspltidp_v2df"
   [(set (match_operand:V2DF 0 "register_operand" )