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From: William Schmidt <wschmidt@gcc.gnu.org>
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Subject: [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
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https://gcc.gnu.org/g:e0ff385d79fefb71b7daad111082307e3cb924b4

commit e0ff385d79fefb71b7daad111082307e3cb924b4
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date:   Thu Apr 1 14:19:46 2021 -0500

    rs6000: Add Cell builtins
    
    2021-04-01  Bill Schmidt  <wschmidt@linux.ibm.com>
    
    gcc/
            * config/rs6000/rs6000-builtin-new.def: Add cell stanza.

Diff:
---
 gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 05bff08db36..5609e29affd 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1099,6 +1099,33 @@
     VEC_SET_V8HI nothing {set}
 
 
+; Cell builtins.
+[cell]
+  pure vsc __builtin_altivec_lvlx (signed long, const void *);
+    LVLX altivec_lvlx {ldvec}
+
+  pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+    LVLXL altivec_lvlxl {ldvec}
+
+  pure vsc __builtin_altivec_lvrx (signed long, const void *);
+    LVRX altivec_lvrx {ldvec}
+
+  pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+    LVRXL altivec_lvrxl {ldvec}
+
+  void __builtin_altivec_stvlx (vsc, signed long, void *);
+    STVLX altivec_stvlx {stvec}
+
+  void __builtin_altivec_stvlxl (vsc, signed long, void *);
+    STVLXL altivec_stvlxl {stvec}
+
+  void __builtin_altivec_stvrx (vsc, signed long, void *);
+    STVRX altivec_stvrx {stvec}
+
+  void __builtin_altivec_stvrxl (vsc, signed long, void *);
+    STVRXL altivec_stvrxl {stvec}
+
+
 ; VSX builtins.
 [vsx]
   pure vsq __builtin_altivec_lvx_v1ti (signed long, const void *);