[gcc(refs/users/meissner/heads/work044)] Add xxspltidp support to output_vec_const_move.

[gcc(refs/users/meissner/heads/work044)] Add xxspltidp support to output_vec_const_move.

[Michael Meissner]

https://gcc.gnu.org/g:75d6b80cdff027f87f0e95cc0620267d20d1f278

commit 75d6b80cdff027f87f0e95cc0620267d20d1f278
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 6 14:29:04 2021 -0400

    Add xxspltidp support to output_vec_const_move.
    
    This adds support for XXSPLTIDP to the generic vector load constant
    support.
    
    gcc/
    2021-04-06  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs60000/predicates.md (xxspltidp_operand): Use
            xxspltidp_constant_p for processing.
            * config/rs6000/rs6000-prototypes.h (xxspltidp_constant_p): New
            declaration.
            * config/rs6000/rs6000.c (xxspltidp_constant_p): New function.
            (output_vec_const_move): Add XXSPLTIDP support.

Diff:
---
 gcc/config/rs6000/predicates.md   | 42 ++--------------------------
 gcc/config/rs6000/rs6000-protos.h |  1 +
 gcc/config/rs6000/rs6000.c        | 58 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 61 insertions(+), 40 deletions(-)

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 3801ee14c4f..b944be51bda 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -573,47 +573,9 @@
 (define_predicate "xxspltidp_operand"
   (match_code "const_double,const_vector,vec_duplicate")
 {
-  long value;
+  rtx value = NULL_RTX;
 
-  if (!TARGET_XXSPLTIDP)
-    return 0;
-
-  if (mode == V2DFmode)
-    {
-      /* Handle VEC_DUPLICATE and CONST_VECTOR.  */
-      if (GET_CODE (op) == VEC_DUPLICATE)
-       op = XEXP (op, 0);
-
-      else if (GET_CODE (op) == CONST_VECTOR)
-       {
-         rtx element = CONST_VECTOR_ELT (op, 0);
-         if (!rtx_equal_p (element, CONST_VECTOR_ELT (op, 1)))
-           return 0;
-
-	 op = element;
-       }
-
-      else
-       return 0;
-    }
-
-  else if (mode != SFmode && mode != DFmode)
-    return 0;
-
-  if (!CONST_DOUBLE_P (op))
-    return 0;
-
-  const struct real_value *rv = CONST_DOUBLE_REAL_VALUE (op);
-  if (!exact_real_truncate (SFmode, rv))
-    return 0;
-
-  REAL_VALUE_TO_TARGET_SINGLE (*rv, value);
-
-  /* Test for SFmode denormal (exponent is 0, mantissa field is non-zero).  */
-  if (((value & 0x7F800000) == 0) && ((value & 0x7FFFFF) != 0))
-    return 0;
-
-  return 1;
+  return xxspltidp_constant_p (op, mode, &value);
 })
 
 ;; Return 1 if operand is a CONST_DOUBLE that can be set in a register
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index cee365ea7d6..1ade07adbe6 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -33,6 +33,7 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, int, int, int,
 extern bool easy_altivec_constant (rtx, machine_mode);
 extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *);
 extern bool xxspltiw_constant_p (rtx, machine_mode, long *);
+extern bool xxspltidp_constant_p (rtx, machine_mode, rtx *);
 extern int vspltis_shifted (rtx);
 extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
 extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index cc92690f5d6..36ea2750257 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6536,6 +6536,57 @@ xxspltiw_constant_p (rtx op,
   return true;
 }
 
+/* Return true if OP is of the given MODE and can be synthesized with ISA 3.1
+   XXSPLTIDP instruction.
+
+   Return the constant that is being split via CONSTANT_PTR.  */
+
+bool
+xxspltidp_constant_p (rtx op,
+		      machine_mode mode,
+		      rtx *constant_ptr)
+{
+  *constant_ptr = NULL_RTX;
+
+  rtx element = op;
+  if (mode == V2DFmode)
+    {
+      /* Handle VEC_DUPLICATE and CONST_VECTOR.  */
+      if (GET_CODE (op) == VEC_DUPLICATE)
+       element = XEXP (op, 0);
+
+      else if (GET_CODE (op) == CONST_VECTOR)
+       {
+         element = CONST_VECTOR_ELT (op, 0);
+         if (!rtx_equal_p (element, CONST_VECTOR_ELT (op, 1)))
+           return false;
+       }
+
+      else
+       return false;
+    }
+
+  else if (mode != SFmode && mode != DFmode)
+    return false;
+
+  if (!CONST_DOUBLE_P (element))
+    return false;
+
+  const struct real_value *rv = CONST_DOUBLE_REAL_VALUE (element);
+  if (!exact_real_truncate (SFmode, rv))
+    return 0;
+
+  long value;
+  REAL_VALUE_TO_TARGET_SINGLE (*rv, value);
+
+  /* Test for SFmode denormal (exponent is 0, mantissa field is non-zero).  */
+  if (((value & 0x7F800000) == 0) && ((value & 0x7FFFFF) != 0))
+    return false;
+
+  *constant_ptr = element;
+  return true;
+}
+
 const char *
 output_vec_const_move (rtx *operands)
 {
@@ -6590,6 +6641,13 @@ output_vec_const_move (rtx *operands)
 		  : "xxspltiw %x0,%2");
 	}
 
+      rtx xxspltidp_value = NULL_RTX;
+      if (xxspltidp_constant_p (vec, mode, &xxspltidp_value))
+	{
+	  operands[2] = GEN_INT (rs6000_const_f32_to_i32 (xxspltidp_value));
+	  return "xxspltiw %x0,%2";
+	}
+
       if (TARGET_P9_VECTOR
 	  && xxspltib_constant_p (vec, mode, &num_insns, &xxspltib_value))
 	{