[gcc(refs/users/meissner/heads/work044)] Change xxspltidp_constant_p signature.

[gcc(refs/users/meissner/heads/work044)] Change xxspltidp_constant_p signature.

[Michael Meissner]

https://gcc.gnu.org/g:117e066464905d4003a4c13a9fa0d40a2ecdb86c

commit 117e066464905d4003a4c13a9fa0d40a2ecdb86c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 6 17:16:57 2021 -0400

    Change xxspltidp_constant_p signature.
    
    I decided to change the calling signature for the xxspltidp_constant_p
    function.
    
    gcc/
    2021-04-06  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/predicates.md (xxspltidp_operand): Adapt to new
            xxspltid_constant_p.
            * config/rs6000/rs6000-protos.h (xxspltidp_constant_p): Update
            calling signature.
            * config/rs6000/rs6000.c (xxspltidp_constant_p): Return a long
            instead of rtx.
            (output_vec_const_move): Update xxspltidp_constant_p call.
            * config/rs6000/vsx.md (xxspltidp<mode>): New insn for XXSPLTIDP
            support.

Diff:
---
 gcc/config/rs6000/predicates.md   |  3 +--
 gcc/config/rs6000/rs6000-protos.h |  2 +-
 gcc/config/rs6000/rs6000.c        | 13 +++++++------
 gcc/config/rs6000/vsx.md          | 19 +++++++++++++++++++
 4 files changed, 28 insertions(+), 9 deletions(-)

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index b944be51bda..1f13f63c454 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -573,8 +573,7 @@
 (define_predicate "xxspltidp_operand"
   (match_code "const_double,const_vector,vec_duplicate")
 {
-  rtx value = NULL_RTX;
-
+  long value = 0;
   return xxspltidp_constant_p (op, mode, &value);
 })
 
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 1ade07adbe6..a2abe103551 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -33,7 +33,7 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, int, int, int,
 extern bool easy_altivec_constant (rtx, machine_mode);
 extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *);
 extern bool xxspltiw_constant_p (rtx, machine_mode, long *);
-extern bool xxspltidp_constant_p (rtx, machine_mode, rtx *);
+extern bool xxspltidp_constant_p (rtx, machine_mode, long *);
 extern int vspltis_shifted (rtx);
 extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
 extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index df27e953458..d227efa8ac5 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6539,14 +6539,15 @@ xxspltiw_constant_p (rtx op,
 /* Return true if OP is of the given MODE and can be synthesized with ISA 3.1
    XXSPLTIDP instruction.
 
-   Return the constant that is being split via CONSTANT_PTR.  */
+   Return the constant that is being split via CONSTANT_PTR to use in the
+   XXSPLTIDP instruction.  */
 
 bool
 xxspltidp_constant_p (rtx op,
 		      machine_mode mode,
-		      rtx *constant_ptr)
+		      long *constant_ptr)
 {
-  *constant_ptr = NULL_RTX;
+  *constant_ptr = 0;
 
   rtx element = op;
   if (mode == V2DFmode)
@@ -6583,7 +6584,7 @@ xxspltidp_constant_p (rtx op,
   if (((value & 0x7F800000) == 0) && ((value & 0x7FFFFF) != 0))
     return false;
 
-  *constant_ptr = element;
+  *constant_ptr = value;
   return true;
 }
 
@@ -6653,10 +6654,10 @@ output_vec_const_move (rtx *operands)
 	  return "xxspltiw %x0,%2";
 	}
 
-      rtx xxspltidp_value = NULL_RTX;
+      long xxspltidp_value = 0;
       if (xxspltidp_constant_p (vec, mode, &xxspltidp_value))
 	{
-	  operands[2] = GEN_INT (rs6000_const_f32_to_i32 (xxspltidp_value));
+	  operands[2] = GEN_INT (xxspltidp_value);
 	  return "xxspltidp %x0,%2";
 	}
 
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index be04d9f74bf..bdb21ef8d27 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -1196,6 +1196,25 @@
  [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")])
 
+(define_mode_iterator XXSPLTIDP [SF DF V2DF])
+
+;; XXSPLTIDP support.
+(define_insn "*xxspltidp<mode>"
+  [(set (match_operand:XXSPLTIDP 0 "vsx_register_operand" "=wa")
+	(match_operand:XXSPLTIDP 1 "xxspltidp_operand"))]
+  "TARGET_XXSPLTIDP"
+{
+  long value = 0;
+
+  if (!xxspltidp_constant_p (operands[1], <MODE>mode, &value))
+    gcc_unreachable ();
+
+  operands[2] = GEN_INT (value);
+  return "xxspltidp %x0,%2";
+}
+ [(set_attr "type" "vecperm")
+  (set_attr "prefixed" "yes")])
+
 ;; Prefer using vector registers over GPRs.  Prefer using ISA 3.0's XXSPLTISB
 ;; or Altivec VSPLITW 0/-1 over XXLXOR/XXLORC to set a register to all 0's or
 ;; all 1's, since the machine does not have to wait for the previous