From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 284A43951848; Tue, 13 Apr 2021 18:07:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 284A43951848 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work047 X-Git-Oldrev: a34582b843b2ef84e05679f3a56d09c4f8941024 X-Git-Newrev: 8350d6886cbe960084723438dc55bbb4531c8c3f Message-Id: <20210413180713.284A43951848@sourceware.org> Date: Tue, 13 Apr 2021 18:07:13 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Apr 2021 18:07:13 -0000 https://gcc.gnu.org/g:8350d6886cbe960084723438dc55bbb4531c8c3f commit 8350d6886cbe960084723438dc55bbb4531c8c3f Author: Michael Meissner Date: Tue Apr 13 14:06:52 2021 -0400 Update ChangeLog.meissner. gcc/ 2021-04-13 Michael Meissner * ChangeLog.meissner: Update. gcc/testsuite/ 2021-04-13 Michael Meissner * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 47 ++++++++++++++++++++++++++++++++++++++++ gcc/testsuite/ChangeLog.meissner | 9 ++++++++ 2 files changed, 56 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 4bd699fde04..80756b91acb 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,50 @@ +work047.patch016: +2021-04-13 Michael Meissner + + * config/rs6000/altivec.me (UNSPEC_XXSPLTI32DX): Move to vsx.md. + (xxsplti32dx_v4si): Move to vsx.md. + (xxsplti32dx_v4si_inst): Move to vsx.md. + (xxsplti32dx_v4sf): Move to vsx.md. + (xxsplti32dx_v4sf_inst): Move to vsx.md. + * config/rs6000/contraints.md (eD): New constraint. + * config/rs6000/predicates.md (easy_fp_constant): If we can load + the constant with a pair of XXSPLTI32DX instructions, it is easy. + (xxsplti32dx_operand): New predicate. + (easy_vector_constant): If we can load the constant with a pair of + XXSPLTI32DX instructions, it is easy. + * config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add + -mxxsplti32dx. + (POWERPC_MASKS): Add -mxxsplti32dx. + * config/rs6000/rs6000-protos.h (xxsplti32dx_constant_p): New + declaration. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Add + -mxxsplti32dx support. + (xxsplti32dx_constant_p): New helper function. + (output_vec_const_move): Split constants that need XXSPLTI32DX. + (rs6000_opt_masks): Add -mxxsplti32dx. + * config/rs6000/rs6000.md (movsf_hardfloat): Add support for + loading constants with XXSPLTI32DX. + (mov_hardfloat32, FMOVE64 iterator): Add support for loading + constants with XXSPLTI32DX. + (mov_hardfloat64, FMOVE64 iterator): Add support for loading + constants with XXSPLTI32DX. + * config/rs6000/rs6000.opt (-mxxsplti32dx): New switch. + * config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX): Move unspec here from + altivec.md. + (UNSPEC_XXSPLTI32DX_CONST): New unspec. + (vsx_mov_64bit): Bump up size of 'W' vector constants to + accomidate a pair of XXSPLTI32DX instructions. + (vsx_mov_32bit): Bump up size of 'W' vector constants to + accomidate a pair of XXSPLTI32DX instructions. + (XXSPLTI32DX): New mode iterator. + (xxsplti32dx_): New insn and splits. + (xxsplti32dx__first): New insns. + (xxsplti32dx__second): New insns. + (xxsplti32dx_v4si): Move here from altivec.md. + (xxsplti32dx_v4si_inst): Move here from altivec.md. + (xxsplti32dx_v4sf): Move here from altivec.md. + (xxsplti32dx_v4sf_inst): Move here from altivec.md. + work047.patch014: 2021-04-13 Michael Meissner diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner index 25ef1654c30..b61a37d9e59 100644 --- a/gcc/testsuite/ChangeLog.meissner +++ b/gcc/testsuite/ChangeLog.meissner @@ -1,3 +1,12 @@ +work047.patch016: +2021-04-13 Michael Meissner + + * gcc.target/powerpc/vec-splati-runnable.c: Update insn count. + * gcc.target/powerpc/vec-splat-constant-sf.c: Update insn count. + * gcc.target/powerpc/vec-splat-constant-df.c: Update insn count. + * gcc.target/powerpc/vec-splat-constant-v2df.c: Update insn + count. + work047.patch015: 2021-04-13 Michael Meissner