From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id E4344395205E; Tue, 13 Apr 2021 19:53:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E4344395205E Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work047)] Move XXEVAL from altivec.md to vsx.md. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work047 X-Git-Oldrev: 486e7fb16342388389adef0b15c27379b626cdf8 X-Git-Newrev: bcfe3df4b38ac59b7dda498db21b64997b56fd39 Message-Id: <20210413195300.E4344395205E@sourceware.org> Date: Tue, 13 Apr 2021 19:53:00 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Apr 2021 19:53:01 -0000 https://gcc.gnu.org/g:bcfe3df4b38ac59b7dda498db21b64997b56fd39 commit bcfe3df4b38ac59b7dda498db21b64997b56fd39 Author: Michael Meissner Date: Tue Apr 13 15:52:39 2021 -0400 Move XXEVAL from altivec.md to vsx.md. This patch moves the XXEVAL support from altivec.md to vsx.md. Given the instruction support all VSX registers, vsx.md is a more proper place for this instruction. gcc/ 2021-04-13 Michael Meissner * config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md. (xxeval): Move to vsx.md. * config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md. (xxeval): Move from altivec.md. Diff: --- gcc/config/rs6000/altivec.md | 13 ------------- gcc/config/rs6000/vsx.md | 14 ++++++++++++++ 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index aa11bda1865..a1ba10b0275 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -171,7 +171,6 @@ UNSPEC_VPEXTD UNSPEC_VCLRLB UNSPEC_VCLRRB - UNSPEC_XXEVAL UNSPEC_VSTRIR UNSPEC_VSTRIL UNSPEC_SLDB @@ -3464,18 +3463,6 @@ [(set_attr "type" "vecperm") (set_attr "isa" "p9v,*")]) -(define_insn "xxeval" - [(set (match_operand:V2DI 0 "register_operand" "=wa") - (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa") - (match_operand:V2DI 2 "altivec_register_operand" "wa") - (match_operand:V2DI 3 "altivec_register_operand" "wa") - (match_operand:QI 4 "u8bit_cint_operand" "n")] - UNSPEC_XXEVAL))] - "TARGET_POWER10" - "xxeval %0,%1,%2,%3,%4" - [(set_attr "type" "vecsimple") - (set_attr "prefixed" "yes")]) - (define_expand "vec_unpacku_hi_v16qi" [(set (match_operand:V8HI 0 "register_operand" "=v") (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")] diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d08ddc5c398..23e044884ad 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -373,6 +373,7 @@ UNSPEC_XXSPLTI32DX UNSPEC_XXSPLTI32DX_CONST UNSPEC_XXPERMX + UNSPEC_XXEVAL ]) (define_int_iterator XVCVBF16 [UNSPEC_VSX_XVCVSPBF16 @@ -6509,3 +6510,16 @@ "xxpermx %x0,%x1,%x2,%x3,%4" [(set_attr "type" "vecsimple") (set_attr "prefixed" "yes")]) + +;; XXEVAL built-in function support. +(define_insn "xxeval" + [(set (match_operand:V2DI 0 "register_operand" "=wa") + (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa") + (match_operand:V2DI 2 "altivec_register_operand" "wa") + (match_operand:V2DI 3 "altivec_register_operand" "wa") + (match_operand:QI 4 "u8bit_cint_operand" "n")] + UNSPEC_XXEVAL))] + "TARGET_POWER10" + "xxeval %0,%1,%2,%3,%4" + [(set_attr "type" "vecsimple") + (set_attr "prefixed" "yes")])