From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2168) id 1AA7E385E83A; Thu, 15 Apr 2021 00:17:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1AA7E385E83A MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: GCC Administrator To: gcc-cvs@gcc.gnu.org Subject: [gcc r11-8185] Daily bump. X-Act-Checkin: gcc X-Git-Author: GCC Administrator X-Git-Refname: refs/heads/master X-Git-Oldrev: a87d3f964df31d4fbceb822c6d293e85c117d992 X-Git-Newrev: df3b1289521e6f24d5151fc5f7b135b8bf3009bc Message-Id: <20210415001721.1AA7E385E83A@sourceware.org> Date: Thu, 15 Apr 2021 00:17:21 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Apr 2021 00:17:21 -0000 https://gcc.gnu.org/g:df3b1289521e6f24d5151fc5f7b135b8bf3009bc commit r11-8185-gdf3b1289521e6f24d5151fc5f7b135b8bf3009bc Author: GCC Administrator Date: Thu Apr 15 00:16:47 2021 +0000 Daily bump. Diff: --- gcc/ChangeLog | 120 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 42 +++++++++++++++++ gcc/d/ChangeLog | 37 +++++++++++++++ gcc/fortran/ChangeLog | 5 ++ gcc/testsuite/ChangeLog | 64 ++++++++++++++++++++++++++ libgomp/ChangeLog | 7 +++ 7 files changed, 276 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0eebc8759d9..90860a78fd4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,123 @@ +2021-04-14 Richard Sandiford + + PR rtl-optimization/99929 + * rtl.h (same_vector_encodings_p): New function. + * cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding. + * cselib.c (rtx_equal_for_cselib_1): Likewise. + * jump.c (rtx_renumbered_equal_p): Likewise. + * lra-constraints.c (operands_match_p): Likewise. + * reload.c (operands_match_p): Likewise. + * rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise. + +2021-04-14 Richard Sandiford + + * print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Print + more information about variable-length CONST_VECTORs. + +2021-04-14 Vladimir N. Makarov + + PR rtl-optimization/100066 + * lra-constraints.c (split_reg): Check paradoxical_subreg_p for + ordered modes when choosing splitting mode for hard reg. + +2021-04-14 Richard Sandiford + + PR target/99246 + * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel): + New function. + (aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2. + +2021-04-14 Andreas Krebbel + + * config/s390/s390-builtins.def (O_M5, O_M12, ...): Add new macros + for mask operand types. + (s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64) + (s390_vec_permi_dbl, s390_vpdi): Use the M5 type for the immediate + operand. + (s390_vec_msum_u128, s390_vmslg): Use the M12 type for the + immediate operand. + * config/s390/s390.c (s390_const_operand_ok): Check the new + operand types and generate a list of valid values. + +2021-04-14 Iain Buclaw + + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (D language and ABI): Add @hook for + TARGET_D_REGISTER_OS_TARGET_INFO. + +2021-04-14 Iain Buclaw + + * config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New + function. + (aarch64_d_register_target_info): New function. + * config/aarch64/aarch64-protos.h (aarch64_d_register_target_info): + Declare. + * config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO): + Define. + * config/arm/arm-d.c (arm_d_handle_target_float_abi): New function. + (arm_d_register_target_info): New function. + * config/arm/arm-protos.h (arm_d_register_target_info): Declare. + * config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function. + (ix86_d_register_target_info): New function. + * config/i386/i386-protos.h (ix86_d_register_target_info): Declare. + * config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/mips/mips-d.c (mips_d_handle_target_float_abi): New function. + (mips_d_register_target_info): New function. + * config/mips/mips-protos.h (mips_d_register_target_info): Declare. + * config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/pa/pa-d.c (pa_d_handle_target_float_abi): New function. + (pa_d_register_target_info): New function. + * config/pa/pa-protos.h (pa_d_register_target_info): Declare. + * config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New + function. + (riscv_d_register_target_info): New function. + * config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare. + * config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New + function. + (rs6000_d_register_target_info): New function. + * config/rs6000/rs6000-protos.h (rs6000_d_register_target_info): + Declare. + * config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/s390/s390-d.c (s390_d_handle_target_float_abi): New function. + (s390_d_register_target_info): New function. + * config/s390/s390-protos.h (s390_d_register_target_info): Declare. + * config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New + function. + (sparc_d_register_target_info): New function. + * config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare. + * config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (D language and ABI): Add @hook for + TARGET_D_REGISTER_CPU_TARGET_INFO. + +2021-04-14 Iain Buclaw + + * config/i386/i386-d.c (ix86_d_has_stdcall_convention): New function. + * config/i386/i386-protos.h (ix86_d_has_stdcall_convention): Declare. + * config/i386/i386.h (TARGET_D_HAS_STDCALL_CONVENTION): Define. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (D language and ABI): Add @hook for + TARGET_D_HAS_STDCALL_CONVENTION. + +2021-04-14 Richard Biener + + * tree-cfg.c (verify_gimple_assign_ternary): Verify that + VEC_COND_EXPRs have a gimple_val condition. + * tree-ssa-propagate.c (valid_gimple_rhs_p): VEC_COND_EXPR + can no longer have a GENERIC condition. + +2021-04-14 Richard Earnshaw + + PR target/100067 + * config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits + from the isa_delta when -mfpu has been used. + (arm_options_perform_arch_sanity_checks): It's the architecture that + lacks an FPU not the processor. + 2021-04-13 Richard Biener PR tree-optimization/100053 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 3219cc3cd75..e9d3aa7a596 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210414 +20210415 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 9145630d43b..e5082228577 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,45 @@ +2021-04-14 Jason Merrill + + PR c++/100078 + PR c++/93085 + * pt.c (uses_outer_template_parms): Also look at default + template argument. + +2021-04-14 Jason Merrill + + PR c++/93314 + * semantics.c (finish_id_expression_1): Clear cp_unevaluated_operand + for a non-static data member in a constant-expression. + +2021-04-14 Patrick Palka + + PR c++/83476 + PR c++/99885 + * pt.c (deducible_expression): Look through implicit + INDIRECT_REFs as well. + +2021-04-14 Jason Merrill + + PR c++/99478 + * parser.c (cp_parser_lambda_expression): Reject lambda + in template parameter type. + +2021-04-14 Jason Merrill + + PR c++/90674 + * decl.c (duplicate_decls): Don't propagate + DECL_INITIALIZED_IN_CLASS_P to a specialization. + +2021-04-14 Jason Merrill + + PR c++/88742 + PR c++/49951 + PR c++/58123 + * semantics.c (set_cleanup_locs): New. + (do_poplevel): Call it. + * parser.c (cp_parser_compound_statement): Consume the } + before finish_compound_stmt. + 2021-04-13 Jason Merrill PR c++/100032 diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog index 11206f25de4..fe89d7b399b 100644 --- a/gcc/d/ChangeLog +++ b/gcc/d/ChangeLog @@ -1,3 +1,40 @@ +2021-04-14 Iain Buclaw + + * d-target.cc (Target::_init): Call new targetdm hook to register OS + specific target info keys. + * d-target.def (d_register_os_target_info): New hook. + +2021-04-14 Iain Buclaw + + * d-builtins.cc (d_add_builtin_version): Remove all setting of + target-specific global.params. + * typeinfo.cc (create_typeinfo): Don't add argType fields to + TypeInfo_Struct. + +2021-04-14 Iain Buclaw + + PR d/99914 + * decl.cc (DeclVisitor::visit (StructDeclaration *)): Don't set + DECL_INSTANTIATED on static initializer declarations. + (DeclVisitor::visit (ClassDeclaration *)): Likewise. + (DeclVisitor::visit (EnumDeclaration *)): Likewise. + (d_finish_decl): Move call to set_linkage_for_decl to... + (declare_extern_var): ...here. + +2021-04-14 Iain Buclaw + + * d-target.cc (Target::_init): Call new targetdm hook to register CPU + specific target info keys. + * d-target.def (d_register_cpu_target_info): New hook. + +2021-04-14 Iain Buclaw + + * d-target.cc (Target::systemLinkage): Return LINKwindows if + d_has_stdcall_convention applies to LINKsystem. + * d-target.def (d_has_stdcall_convention): New hook. + * types.cc (TypeVisitor::visit (TypeFunction *)): Insert "stdcall" + function attribute if d_has_stdcall_convention applies to LINKwindows. + 2021-04-10 Iain Buclaw * dmd/MERGE: Merge upstream dmd 0450061c8. diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 8fc11598b19..1f8578ccd6a 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,8 @@ +2021-04-14 Martin Liska + + * intrinsic.texi: The table has first column empty and it makes + trouble when processing makeinfo --xml output. + 2021-04-09 Tobias Burnus PR fortran/99817 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1f79bc39928..d9e9168fbf3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,67 @@ +2021-04-14 Richard Sandiford + + * gcc.target/aarch64/sve/pr99929_1.c: New file. + * gcc.target/aarch64/sve/pr99929_2.c: Likewise. + +2021-04-14 Jason Merrill + + PR c++/100078 + * g++.dg/template/dependent-tmpl2.C: New test. + +2021-04-14 Jason Merrill + + PR c++/93314 + * g++.dg/parse/uneval1.C: New test. + +2021-04-14 Vladimir N. Makarov + + PR rtl-optimization/100066 + * gcc.target/i386/pr100066.c: New. + +2021-04-14 Martin Sebor + + * gcc.dg/pr86058.c: Limit to just x86_64. + +2021-04-14 Richard Sandiford + + PR target/99246 + * gcc.target/aarch64/sve/acle/general/pr99246.c: New test. + +2021-04-14 Andreas Krebbel + + * gcc.target/s390/zvector/imm-range-error-1.c: New test. + * gcc.target/s390/zvector/vec_msum_u128-1.c: New test. + +2021-04-14 Patrick Palka + + PR c++/83476 + PR c++/99885 + * g++.dg/cpp1z/class-deduction85.C: New test. + * g++.dg/template/ref11.C: New test. + +2021-04-14 Jason Merrill + + PR c++/99478 + * g++.dg/cpp2a/lambda-uneval14.C: New test. + +2021-04-14 Jason Merrill + + PR c++/90674 + * g++.dg/debug/defaulted1.C: New test. + +2021-04-14 Jason Merrill + + PR c++/88742 + * g++.dg/debug/cleanup1.C: New test. + * c-c++-common/Wimplicit-fallthrough-6.c: Adjust diagnostic line. + * c-c++-common/Wimplicit-fallthrough-7.c: Likewise. + * g++.dg/cpp2a/constexpr-dtor3.C: Likewise. + * g++.dg/ext/constexpr-attr-cleanup1.C: Likewise. + * g++.dg/tm/inherit2.C: Likewise. + * g++.dg/tm/unsafe1.C: Likewise. + * g++.dg/warn/Wimplicit-fallthrough-1.C: Likewise. + * g++.dg/gcov/gcov-2.C: Adjust coverage counts. + 2021-04-13 Martin Sebor PR tree-optimization/82800 diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog index 0be18fbde64..ca800b8cfaf 100644 --- a/libgomp/ChangeLog +++ b/libgomp/ChangeLog @@ -1,3 +1,10 @@ +2021-04-14 Jakub Jelinek + + PR testsuite/100071 + * testsuite/libgomp.fortran/alloc-1.F90: Call c_f_pointer after last + cp = omp_alloc with cp, p arguments instead of cq, q and call + c_f_pointer after last cq = omp_alloc with cq, q. + 2021-04-11 Hafiz Abid Qadeer PR middle-end/98088