From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7806) id F2B633857C68; Tue, 20 Apr 2021 07:51:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F2B633857C68 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Stefan Schulze Frielinghaus To: gcc-cvs@gcc.gnu.org Subject: [gcc r11-8256] testsuite: Fix up gcc.target/s390/zero-scratch-regs-1.c X-Act-Checkin: gcc X-Git-Author: Stefan Schulze Frielinghaus X-Git-Refname: refs/heads/master X-Git-Oldrev: 67378cd63d62bf0c69e966d1d202a1e586550a68 X-Git-Newrev: 250f234988b6231669a720c52101d3686d645072 Message-Id: <20210420075134.F2B633857C68@sourceware.org> Date: Tue, 20 Apr 2021 07:51:34 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Apr 2021 07:51:35 -0000 https://gcc.gnu.org/g:250f234988b6231669a720c52101d3686d645072 commit r11-8256-g250f234988b6231669a720c52101d3686d645072 Author: Stefan Schulze Frielinghaus Date: Tue Apr 20 09:51:16 2021 +0200 testsuite: Fix up gcc.target/s390/zero-scratch-regs-1.c Depending on whether GCC is configured using --with-mode=zarch or not, for the 31bit target instructions are generated either for ESA or z/Architecture. For the sake of simplicity and robustness test only for the latter by adding manually option -mzarch. gcc/testsuite/ChangeLog: * gcc.target/s390/zero-scratch-regs-1.c: Force test to run for z/Architecture only. Diff: --- .../gcc.target/s390/zero-scratch-regs-1.c | 95 +++++++++------------- 1 file changed, 40 insertions(+), 55 deletions(-) diff --git a/gcc/testsuite/gcc.target/s390/zero-scratch-regs-1.c b/gcc/testsuite/gcc.target/s390/zero-scratch-regs-1.c index c394c4b69e7..1c02c0c4e51 100644 --- a/gcc/testsuite/gcc.target/s390/zero-scratch-regs-1.c +++ b/gcc/testsuite/gcc.target/s390/zero-scratch-regs-1.c @@ -1,65 +1,50 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fzero-call-used-regs=all -march=z13" } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=z13 -mzarch" } */ /* Ensure that all call clobbered GPRs, FPRs, and VRs are zeroed and all call saved registers are kept. */ void foo (void) { } -/* { dg-final { scan-assembler-times "lhi\t" 6 { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r0,0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r1,0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r2,0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r3,0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r4,0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lhi\t%r5,0" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler-times "lghi\t" 6 } } */ +/* { dg-final { scan-assembler "lghi\t%r0,0" } } */ +/* { dg-final { scan-assembler "lghi\t%r1,0" } } */ +/* { dg-final { scan-assembler "lghi\t%r2,0" } } */ +/* { dg-final { scan-assembler "lghi\t%r3,0" } } */ +/* { dg-final { scan-assembler "lghi\t%r4,0" } } */ +/* { dg-final { scan-assembler "lghi\t%r5,0" } } */ -/* { dg-final { scan-assembler-times "lzdr\t" 14 { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f0" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f1" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f2" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f3" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f5" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f7" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f8" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f9" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f10" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f11" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f12" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f13" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f14" { target { ! lp64 } } } } */ -/* { dg-final { scan-assembler "lzdr\t%f15" { target { ! lp64 } } } } */ - -/* { dg-final { scan-assembler-times "lghi\t" 6 { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r0,0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r1,0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r2,0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r3,0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r4,0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "lghi\t%r5,0" { target { lp64 } } } } */ - -/* { dg-final { scan-assembler-times "vzero\t" 24 { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v0" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v1" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v2" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v3" { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times "vzero\t" 30 { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler-times "vzero\t" 24 { target { lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v0" } } */ +/* { dg-final { scan-assembler "vzero\t%v1" } } */ +/* { dg-final { scan-assembler "vzero\t%v2" } } */ +/* { dg-final { scan-assembler "vzero\t%v3" } } */ /* { dg-final { scan-assembler "vzero\t%v4" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v5" { target { lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v5" } } */ /* { dg-final { scan-assembler "vzero\t%v6" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v7" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v16" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v17" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v18" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v19" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v20" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v21" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v22" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v23" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v24" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v25" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v26" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v27" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v28" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v29" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v30" { target { lp64 } } } } */ -/* { dg-final { scan-assembler "vzero\t%v31" { target { lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v7" } } */ +/* { dg-final { scan-assembler "vzero\t%v8" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v9" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v10" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v11" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v12" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v13" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v14" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v15" { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler "vzero\t%v16" } } */ +/* { dg-final { scan-assembler "vzero\t%v17" } } */ +/* { dg-final { scan-assembler "vzero\t%v18" } } */ +/* { dg-final { scan-assembler "vzero\t%v19" } } */ +/* { dg-final { scan-assembler "vzero\t%v20" } } */ +/* { dg-final { scan-assembler "vzero\t%v21" } } */ +/* { dg-final { scan-assembler "vzero\t%v22" } } */ +/* { dg-final { scan-assembler "vzero\t%v23" } } */ +/* { dg-final { scan-assembler "vzero\t%v24" } } */ +/* { dg-final { scan-assembler "vzero\t%v25" } } */ +/* { dg-final { scan-assembler "vzero\t%v26" } } */ +/* { dg-final { scan-assembler "vzero\t%v27" } } */ +/* { dg-final { scan-assembler "vzero\t%v28" } } */ +/* { dg-final { scan-assembler "vzero\t%v29" } } */ +/* { dg-final { scan-assembler "vzero\t%v30" } } */ +/* { dg-final { scan-assembler "vzero\t%v31" } } */