[gcc(refs/users/clyon/heads/mve-autovec)] arm: Auto-vectorization for MVE: vld2/vst2

[Christophe Lyon <clyon@gcc.gnu.org>]

https://gcc.gnu.org/g:c20869cbfd44d4159fcb869d553092f6ec376c21

commit c20869cbfd44d4159fcb869d553092f6ec376c21
Author: Christophe Lyon <christophe.lyon@linaro.org>
Date:   Mon Mar 8 12:23:49 2021 +0000

    arm: Auto-vectorization for MVE: vld2/vst2
    
    This patch enables MVE vld2/vst2 instructions for auto-vectorization.
    We move the existing expanders from neon.md and enable them for MVE,
    calling the respective emitter.
    
    2021-03-12  Christophe Lyon  <christophe.lyon@linaro.org>
    
            gcc/
            * config/arm/neon.md (vec_load_lanesoi<mode>)
            (vec_store_lanesoi<mode>): Move ...
            * config/arm/vec-common.md: here.
    
            gcc/testsuite/
            * gcc.target/arm/simd/mve-vld2.c: New test, derived from
            slp-perm-2.c

Diff:
---
 gcc/config/arm/neon.md                       | 14 ---------
 gcc/config/arm/vec-common.md                 | 27 +++++++++++++++++
 gcc/testsuite/gcc.target/arm/simd/mve-vld2.c | 44 ++++++++++++++++++++++++++++
 3 files changed, 71 insertions(+), 14 deletions(-)

diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 6660846bd57..bc8775c1968 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -5063,13 +5063,6 @@ if (BYTES_BIG_ENDIAN)
                     (const_string "neon_load2_2reg<q>")))]
 )
 
-(define_expand "vec_load_lanesoi<mode>"
-  [(set (match_operand:OI 0 "s_register_operand")
-        (unspec:OI [(match_operand:OI 1 "neon_struct_operand")
-                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-		   UNSPEC_VLD2))]
-  "TARGET_NEON")
-
 (define_insn "neon_vld2<mode>"
   [(set (match_operand:OI 0 "s_register_operand" "=w")
         (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
@@ -5197,13 +5190,6 @@ if (BYTES_BIG_ENDIAN)
                     (const_string "neon_store2_one_lane<q>")))]
 )
 
-(define_expand "vec_store_lanesoi<mode>"
-  [(set (match_operand:OI 0 "neon_struct_operand")
-	(unspec:OI [(match_operand:OI 1 "s_register_operand")
-                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
-                   UNSPEC_VST2))]
-  "TARGET_NEON")
-
 (define_insn "neon_vst2<mode>"
   [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
 	(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
index 034b48b0f57..9abc7ed4426 100644
--- a/gcc/config/arm/vec-common.md
+++ b/gcc/config/arm/vec-common.md
@@ -466,6 +466,33 @@
     }
   else
     gcc_unreachable ();
+  DONE;
+})
 
+(define_expand "vec_load_lanesoi<mode>"
+  [(set (match_operand:OI 0 "s_register_operand")
+        (unspec:OI [(match_operand:OI 1 "neon_struct_operand")
+                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+		   UNSPEC_VLD2))]
+  "TARGET_NEON || TARGET_HAVE_MVE"
+{
+  if (TARGET_NEON)
+    emit_insn (gen_neon_vld2<mode> (operands[0], operands[1]));
+  else
+    emit_insn (gen_mve_vld2q<mode> (operands[0], operands[1]));
+  DONE;
+})
+
+(define_expand "vec_store_lanesoi<mode>"
+  [(set (match_operand:OI 0 "neon_struct_operand")
+	(unspec:OI [(match_operand:OI 1 "s_register_operand")
+                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                   UNSPEC_VST2))]
+  "TARGET_NEON || TARGET_HAVE_MVE"
+{
+  if (TARGET_NEON)
+    emit_insn (gen_neon_vst2<mode> (operands[0], operands[1]));
+  else
+    emit_insn (gen_mve_vst2q<mode> (operands[0], operands[1]));
   DONE;
 })
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c b/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c
new file mode 100644
index 00000000000..9778588f9e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vld2.c
@@ -0,0 +1,44 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O3" } */
+
+#include <stdint.h>
+
+#define M00 100
+#define M10 216
+#define M01 1322
+#define M11 13
+
+#define N 128
+
+#define FUNC(SIGN, TYPE, BITS)					 \
+  void foo_##SIGN##BITS##x (TYPE##BITS##_t *__restrict__ pInput,	\
+			    TYPE##BITS##_t *__restrict__ pOutput)	\
+  {									\
+    unsigned int i;							\
+    TYPE##BITS##_t  a, b;						\
+    									\
+    for (i = 0; i < N / BITS; i++)					\
+      {									\
+	a = *pInput++;							\
+	b = *pInput++;							\
+									\
+	*pOutput++ = M00 * a + M01 * b;					\
+	*pOutput++ = M10 * a + M11 * b;					\
+      }									\
+  }
+
+FUNC(s, int, 8)
+FUNC(u, uint, 8)
+FUNC(s, int, 16)
+FUNC(u, uint, 16)
+FUNC(s, int, 32)
+FUNC(u, uint, 32)
+
+/* { dg-final { scan-assembler-times {vld2[01].8\t.q[0-9]+, q[0-9]+., } 4 } } */
+/* { dg-final { scan-assembler-times {vld2[01].16\t.q[0-9]+, q[0-9]+., } 4 } } */
+/* { dg-final { scan-assembler-times {vld2[01].32\t.q[0-9]+, q[0-9]+., } 4 } } */
+/* { dg-final { scan-assembler-times {vst2[01].8\t.q[0-9]+, q[0-9]+., } 4 } } */
+/* { dg-final { scan-assembler-times {vst2[01].16\t.q[0-9]+, q[0-9]+., } 4 } } */
+/* { dg-final { scan-assembler-times {vst2[01].32\t.q[0-9]+, q[0-9]+., } 4 } } */