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* [gcc r12-122] aarch64: Handle V4BF V8BF modes in vwcore attribute
@ 2021-04-26 11:02 Kyrylo Tkachov
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From: Kyrylo Tkachov @ 2021-04-26 11:02 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:5320d4e4af76120a402d0c5adef0d1bc92d66e40

commit r12-122-g5320d4e4af76120a402d0c5adef0d1bc92d66e40
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Mon Apr 26 12:01:33 2021 +0100

    aarch64: Handle V4BF V8BF modes in vwcore attribute
    
    While playing with other unrelated changes I hit an assemble-failure bug where
    a pattern (one of the get_lane ones) that was using V4BF, V8BF as part of a
    mode iterator and outputting registers with the vwcore attribute,
    but there is no vwcore mapping for V4BF and V8BF.
    
    This patch fixes that in the obvious way by adding the missing mappings
    
    Bootstrapped and tested on aarch64-none-linux-gnu.
    
    gcc/ChangeLog:
    
            * config/aarch64/iterators.md (vwcore): Handle V4BF, V8BF.

Diff:
---
 gcc/config/aarch64/iterators.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index cac33ae812b..a3d895a67fb 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -1364,6 +1364,7 @@
 			  (V2SI "w") (V4SI "w")
 			  (DI   "x") (V2DI "x")
 			  (V4HF "w") (V8HF "w")
+			  (V4BF "w") (V8BF "w")
 			  (V2SF "w") (V4SF "w")
 			  (V2DF "x")
 			  (VNx16QI "w") (VNx8QI "w") (VNx4QI "w") (VNx2QI "w")


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