[gcc r10-9770] arm: Various MVE vec_duplicate fixes [PR99647]

[gcc r10-9770] arm: Various MVE vec_duplicate fixes [PR99647]

[Alex Coplan]

https://gcc.gnu.org/g:9266a101ac9707a164bd241c00675a45aae01373

commit r10-9770-g9266a101ac9707a164bd241c00675a45aae01373
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Thu Apr 8 09:36:57 2021 +0100

    arm: Various MVE vec_duplicate fixes [PR99647]
    
    This patch fixes various issues with vec_duplicate in the MVE patterns.
    Currently there are two patterns named *mve_mov<mode>. The second of
    these is really a vector duplicate rather than a move, so I've renamed
    it accordingly.
    
    As it stands, there are several issues with this pattern:
    1. The MVE_types iterator has an entry for TImode, but
       vec_duplicate:TI is invalid.
    2. The mode of the operand to vec_duplicate is SImode, but it should
       vary according to the vector mode iterator.
    3. The second alternative of this pattern is bogus: it allows matching
       symbol_refs (the cause of the PR) and const_ints (which means that it
       matches (vec_duplicate (const_int ...)) which is non-canonical: such
       rtxes should be const_vectors instead and handled by the main vector
       move pattern).
    
    This patch fixes all of these issues, and removes the redundant
    *mve_vec_duplicate<mode> pattern.
    
    gcc/ChangeLog:
    
            PR target/99647
            * config/arm/iterators.md (MVE_vecs): New.
            (V_elem): Also handle V2DF.
            * config/arm/mve.md (*mve_mov<mode>): Rename to ...
            (*mve_vdup<mode>): ... this. Remove second alternative since
            vec_duplicate of const_int is not canonical RTL, and we don't
            want to match symbol_refs.
            (*mve_vec_duplicate<mode>): Delete (pattern is redundant).
    
    gcc/testsuite/ChangeLog:
    
            PR target/99647
            * gcc.c-torture/compile/pr99647.c: New test.
    
    (cherry picked from commit 67d56b272021363eb58c319ca3b73beba3a60817)

Diff:
---
 gcc/config/arm/iterators.md                   |  8 +++++---
 gcc/config/arm/mve.md                         | 25 +++++++------------------
 gcc/testsuite/gcc.c-torture/compile/pr99647.c |  5 +++++
 3 files changed, 17 insertions(+), 21 deletions(-)

diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 846bae7b71f..21a938f71bf 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -269,6 +269,7 @@
 
 ;; MVE mode iterator.
 (define_mode_iterator MVE_types [V16QI V8HI V4SI V2DI TI V8HF V4SF V2DF])
+(define_mode_iterator MVE_vecs [V16QI V8HI V4SI V2DI V8HF V4SF V2DF])
 (define_mode_iterator MVE_VLD_ST [V16QI V8HI V4SI V8HF V4SF])
 (define_mode_iterator MVE_0 [V8HF V4SF])
 (define_mode_iterator MVE_1 [V16QI V8HI V4SI V2DI])
@@ -575,9 +576,10 @@
 			  (V4HI "HI") (V8HI "HI")
 			  (V4HF "HF") (V8HF "HF")
 			  (V4BF "BF") (V8BF "BF")
-                          (V2SI "SI") (V4SI "SI")
-                          (V2SF "SF") (V4SF "SF")
-                          (DI "DI")   (V2DI "DI")])
+			  (V2SI "SI") (V4SI "SI")
+			  (V2SF "SF") (V4SF "SF")
+			  (DI   "DI") (V2DI "DI")
+			  (V2DF "DF")])
 
 ;; As above but in lower case.
 (define_mode_attr V_elem_l [(V8QI "qi") (V16QI "qi")
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 11c69443fb9..7614ec37112 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -104,18 +104,14 @@
    (set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*,*")
    (set_attr "neg_pool_range" "*,*,*,*,996,*,*,*,*")])
 
-(define_insn "*mve_mov<mode>"
-  [(set (match_operand:MVE_types 0 "s_register_operand" "=w,w")
-	(vec_duplicate:MVE_types
-	  (match_operand:SI 1 "nonmemory_operand" "r,i")))]
+(define_insn "*mve_vdup<mode>"
+  [(set (match_operand:MVE_vecs 0 "s_register_operand" "=w")
+	(vec_duplicate:MVE_vecs
+	  (match_operand:<V_elem> 1 "s_register_operand" "r")))]
   "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
-{
-  if (which_alternative == 0)
-    return "vdup.<V_sz_elem>\t%q0, %1";
-  return "vmov.<V_sz_elem>\t%q0, %1";
-}
-  [(set_attr "length" "4,4")
-   (set_attr "type" "mve_move,mve_move")])
+  "vdup.<V_sz_elem>\t%q0, %1"
+  [(set_attr "length" "4")
+   (set_attr "type" "mve_move")])
 
 ;;
 ;; [vst4q])
@@ -10739,13 +10735,6 @@
  [(set_attr "type" "mve_move")
   (set_attr "length" "8")])
 
-(define_insn "*mve_vec_duplicate<mode>"
- [(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w")
-       (vec_duplicate:MVE_VLD_ST (match_operand:<V_elem> 1 "general_operand" "r")))]
- "TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
- "vdup.<V_sz_elem>\t%q0, %1"
- [(set_attr "type" "mve_move")])
-
 ;; CDE instructions on MVE registers.
 
 (define_insn "arm_vcx1qv16qi"
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr99647.c b/gcc/testsuite/gcc.c-torture/compile/pr99647.c
new file mode 100644
index 00000000000..701155dd856
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr99647.c
@@ -0,0 +1,5 @@
+/* { dg-do assemble } */
+typedef int __attribute((vector_size(16))) V;
+V f(void) {
+  return (V){ (int)f, (int)f, (int)f, (int)f };
+}