From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1666) id C38FD385802A; Tue, 27 Apr 2021 08:30:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C38FD385802A MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Biener To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-141] tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE X-Act-Checkin: gcc X-Git-Author: Richard Biener X-Git-Refname: refs/heads/master X-Git-Oldrev: 71c8aaf29bb122ebe5e67c84903fd23ff05f04ec X-Git-Newrev: acfe5290406cc70485df8899d14982278a9371f8 Message-Id: <20210427083013.C38FD385802A@sourceware.org> Date: Tue, 27 Apr 2021 08:30:13 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Apr 2021 08:30:13 -0000 https://gcc.gnu.org/g:acfe5290406cc70485df8899d14982278a9371f8 commit r12-141-gacfe5290406cc70485df8899d14982278a9371f8 Author: Richard Biener Date: Tue Apr 27 09:41:38 2021 +0200 tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE PRE has code to adjust TBAA behavior for refs that expects the base operation code to match. The testcase shows a case where we have a VAR_DECL vs. a MEM_REF so add code to give up in such cases. 2021-04-27 Richard Biener PR tree-optimization/100278 * tree-ssa-pre.c (compute_avail): Give up when we cannot adjust TBAA beacuse of mismatching bases. * gcc.dg/tree-ssa/pr100278.c: New testcase. Diff: --- gcc/testsuite/gcc.dg/tree-ssa/pr100278.c | 17 +++++++++++++++++ gcc/tree-ssa-pre.c | 10 ++++++++++ 2 files changed, 27 insertions(+) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c new file mode 100644 index 00000000000..8d702284c3a --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void a() +{ +#if defined __s390__ + register int b asm("r5"); +#elif defined __x86_64__ + register int b asm("eax"); +#else + volatile int b; +#endif + if (b) + b = 1; + for (; b;) + ; +} diff --git a/gcc/tree-ssa-pre.c b/gcc/tree-ssa-pre.c index 2803b58430e..2d22535af87 100644 --- a/gcc/tree-ssa-pre.c +++ b/gcc/tree-ssa-pre.c @@ -4151,6 +4151,16 @@ compute_avail (void) if (ref->set == set || alias_set_subset_of (set, ref->set)) ; + else if (ref1->opcode != ref2->opcode + || (ref1->opcode != MEM_REF + && ref1->opcode != TARGET_MEM_REF)) + { + /* With mismatching base opcodes or bases + other than MEM_REF or TARGET_MEM_REF we + can't do any easy TBAA adjustment. */ + operands.release (); + continue; + } else if (alias_set_subset_of (ref->set, set)) { ref->set = set;