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* [gcc r10-9809] Daily bump.
@ 2021-05-07 0:17 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2021-05-07 0:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8430391f4f90685e29bde0106c8434791cc90f55
commit r10-9809-g8430391f4f90685e29bde0106c8434791cc90f55
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri May 7 00:17:21 2021 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 30 ++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 24 ++++++++++++++++++++++++
libgomp/ChangeLog | 7 +++++++
4 files changed, 62 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43f3800e9aa..82fb240426f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,33 @@
+2021-05-06 Roman Zhuykov <zhroma@ispras.ru>
+
+ Backported from master:
+ 2021-04-30 Roman Zhuykov <zhroma@ispras.ru>
+
+ PR rtl-optimization/100225
+ PR rtl-optimization/84878
+ * modulo-sched.c (sms_schedule): Use note_stores to skip loops
+ where we have an instruction which touches (writes) any hard
+ register from df->regular_block_artificial_uses set.
+ Allow not-single-set instruction only right before basic block
+ tail.
+
+2021-05-06 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ Backported from master:
+ 2020-09-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do not
+ check +D32 for CMSE if -mfloat-abi=soft
+
+2021-05-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ Backported from master:
+ 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR target/95646
+ * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
+ 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
+
2021-05-05 Eric Botcazou <ebotcazou@adacore.com>
PR target/100402
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 8e159d53420..b5beafed7df 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210506
+20210507
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 202369c3a7d..7858af18ce6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,27 @@
+2021-05-06 Roman Zhuykov <zhroma@ispras.ru>
+
+ Backported from master:
+ 2021-04-30 Roman Zhuykov <zhroma@ispras.ru>
+
+ PR rtl-optimization/100225
+ PR rtl-optimization/84878
+ * gcc.dg/pr100225.c: New test.
+
+2021-05-06 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ Backported from master:
+ 2020-09-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ * gcc.target/arm/pr95646.c: Fix testism.
+
+2021-05-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ Backported from master:
+ 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR target/95646
+ * gcc.target/arm/pr95646.c: New test.
+
2021-05-05 Eric Botcazou <ebotcazou@adacore.com>
* gcc.c-torture/execute/20210505-1.c: New test.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 9bd9c3d2c56..d483bb4de8a 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,10 @@
+2021-05-06 Roman Zhuykov <zhroma@ispras.ru>
+
+ Backported from master:
+ 2021-04-30 Roman Zhuykov <zhroma@ispras.ru>
+
+ * testsuite/libgomp.oacc-c-c++-common/atomic_capture-3.c: New test.
+
2021-04-18 Hafiz Abid Qadeer <abidh@codesourcery.com>
Backported from master:
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