From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1957) id 761613858022; Fri, 4 Jun 2021 07:21:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 761613858022 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Claudiu Zissulescu To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-1203] arc: Don't allow millicode thunks with reduced register set CPUs. X-Act-Checkin: gcc X-Git-Author: Claudiu Zissulescu X-Git-Refname: refs/heads/master X-Git-Oldrev: 9080a3bf23297885fdc47221da37a71d6dec93c5 X-Git-Newrev: 39e5a954c156f7af16aa1a8f87405433d8031c4e Message-Id: <20210604072101.761613858022@sourceware.org> Date: Fri, 4 Jun 2021 07:21:01 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Jun 2021 07:21:01 -0000 https://gcc.gnu.org/g:39e5a954c156f7af16aa1a8f87405433d8031c4e commit r12-1203-g39e5a954c156f7af16aa1a8f87405433d8031c4e Author: Claudiu Zissulescu Date: Fri Jun 4 10:12:32 2021 +0300 arc: Don't allow millicode thunks with reduced register set CPUs. The millicode thunks are not reduced register set safe. Disable them for CPUs having this option on. gcc/ 2021-06-04 Claudiu Zissulescu * config/arc/arc.c (arc_override_options): Disable millicode thunks when RF16 is on. Signed-off-by: Claudiu Zissulescu Diff: --- gcc/config/arc/arc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index b77d0566386..0d34c964963 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -1451,8 +1451,10 @@ arc_override_options (void) if (TARGET_ARC700 && (arc_tune != ARC_TUNE_ARC7XX)) flag_delayed_branch = 0; - /* Millicode thunks doesn't work with long calls. */ - if (TARGET_LONG_CALLS_SET) + /* Millicode thunks doesn't work for long calls. */ + if (TARGET_LONG_CALLS_SET + /* neither for RF16. */ + || TARGET_RF16) target_flags &= ~MASK_MILLICODE_THUNK_SET; /* Set unaligned to all HS cpus. */