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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work055)] PR 99293: Optimize splat of vec_extract for V2DI/V2DF. Date: Wed, 9 Jun 2021 17:46:49 +0000 (GMT) [thread overview] Message-ID: <20210609174649.AD281399BC15@sourceware.org> (raw) https://gcc.gnu.org/g:801f9b25bfc7821108c664642e089c1549cc202b commit 801f9b25bfc7821108c664642e089c1549cc202b Author: Michael Meissner <meissner@linux.ibm.com> Date: Wed Jun 9 13:46:34 2021 -0400 PR 99293: Optimize splat of vec_extract for V2DI/V2DF. We had optimizations for splat of a vector extract for the other vector types, but we missed having one for V2DI and V2DF. This patch adds a combiner insn to do this optimization. In looking at the source, we had similar optimizations for V4SI and V4SF extract and splats, but we missed doing V2DI/V2DF. Without the patch for the code: vector long long splat_dup_l_0 (vector long long v) { return __builtin_vec_splats (__builtin_vec_extract (v, 0)); } the compiler generates (on a little endian power9): splat_dup_l_0: mfvsrld 9,34 mtvsrdd 34,9,9 blr Now it generates: splat_dup_l_0: xxpermdi 34,34,34,3 blr gcc/ 2021-06-09 Michael Meissner <meissner@linux.ibm.com> PR target/99293 * config/rs6000/vsx.md (vsx_splat_extract_<mode): New insn. gcc/testsuite/ 2021-06-09 Michael Meissner <meissner@linux.ibm.com> PR target/99293 * gcc.target/powerpc/pr99293.c: New test. Diff: --- gcc/config/rs6000/vsx.md | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index bc708113865..008ffbe5366 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4515,6 +4515,24 @@ "lxvdsx %x0,%y1" [(set_attr "type" "vecload")]) +;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element +(define_insn "*vsx_splat_extract_<mode>" + [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa") + (vec_duplicate:VSX_D + (vec_select:<VS_scalar> + (match_operand:VSX_D 1 "vsx_register_operand" "wa") + (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))] + "VECTOR_MEM_VSX_P (<MODE>mode)" +{ + int which_word = INTVAL (operands[2]); + if (!BYTES_BIG_ENDIAN) + which_word = 1 - which_word; + + operands[3] = GEN_INT (which_word ? 3 : 0); + return "xxpermdi %x0,%x1,%x1,%3"; +} + [(set_attr "type" "vecperm")]) + ;; V4SI splat support (define_insn "vsx_splat_v4si" [(set (match_operand:V4SI 0 "vsx_register_operand" "=we,we")
next reply other threads:[~2021-06-09 17:46 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-09 17:46 Michael Meissner [this message] 2021-06-09 17:49 Michael Meissner
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