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From: Jakub Jelinek <jakub@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r12-1448] expr: Fix up VEC_PACK_TRUNC_EXPR expansion [PR101046]
Date: Tue, 15 Jun 2021 09:37:33 +0000 (GMT)	[thread overview]
Message-ID: <20210615093733.991F3398A861@sourceware.org> (raw)

https://gcc.gnu.org/g:008153c8435ca3bf587e11654c31f05c0f99b43a

commit r12-1448-g008153c8435ca3bf587e11654c31f05c0f99b43a
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Jun 15 11:36:47 2021 +0200

    expr: Fix up VEC_PACK_TRUNC_EXPR expansion [PR101046]
    
    The following testcase ICEs, because we have a mode mismatch.
    VEC_PACK_TRUNC_EXPR's operands have different modes from the result
    (same vector mode size but twice as large element),
    but we were passing non-NULL subtarget with the mode of the result
    to the expansion of its arguments, so the VEC_PERM_EXPR in one of the
    operands which had V8SImode operands and result had V16HImode target.
    
    Fixed by clearing the subtarget if we are changing mode.
    
    2021-06-15  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/101046
            * expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR,
            case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode.
    
            * gcc.target/i386/pr101046.c: New test.

Diff:
---
 gcc/expr.c                               |  2 ++
 gcc/testsuite/gcc.target/i386/pr101046.c | 15 +++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/gcc/expr.c b/gcc/expr.c
index e4660f0e90a..231487f0d43 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -9998,6 +9998,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
     case VEC_PACK_SAT_EXPR:
     case VEC_PACK_FIX_TRUNC_EXPR:
       mode = TYPE_MODE (TREE_TYPE (treeop0));
+      subtarget = NULL_RTX;
       goto binop;
 
     case VEC_PACK_TRUNC_EXPR:
@@ -10021,6 +10022,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
 	  return eops[0].value;
 	}
       mode = TYPE_MODE (TREE_TYPE (treeop0));
+      subtarget = NULL_RTX;
       goto binop;
 
     case VEC_PACK_FLOAT_EXPR:
diff --git a/gcc/testsuite/gcc.target/i386/pr101046.c b/gcc/testsuite/gcc.target/i386/pr101046.c
new file mode 100644
index 00000000000..6ce4695da07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr101046.c
@@ -0,0 +1,15 @@
+/* PR target/101046 */
+/* { dg-do compile } */
+/* { dg-options "-ftree-ter -mavx512bw -mavx512vl" } */
+
+typedef unsigned short __attribute__((__vector_size__(16))) U;
+typedef unsigned int __attribute__((__vector_size__(16))) V;
+typedef unsigned int __attribute__((__vector_size__(32))) W;
+
+U
+foo (void)
+{
+  return __builtin_convertvector (__builtin_shufflevector ((V){}, (W){},
+							   0, 0, 1, 0,
+							   5, 5, 0, 2), U);
+}


                 reply	other threads:[~2021-06-15  9:37 UTC|newest]

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