[gcc r10-9931] rs6000: MMA builtin usage ICEs when used in a #pragma omp parallel and using -fopenmp [PR100777]

[gcc r10-9931] rs6000: MMA builtin usage ICEs when used in a #pragma omp parallel and using -fopenmp [PR100777]

[Peter Bergner]

https://gcc.gnu.org/g:9e10782370391ed48d2a690a4205594f6b7d2fbe

commit r10-9931-g9e10782370391ed48d2a690a4205594f6b7d2fbe
Author: Peter Bergner <bergner@linux.ibm.com>
Date:   Mon Jun 14 16:55:18 2021 -0500

    rs6000: MMA builtin usage ICEs when used in a #pragma omp parallel and using -fopenmp [PR100777]
    
    Using an MMA builtin within an openmp parallel code block, leads to an SSA
    verification ICE on the temporaries we create while expanding the MMA builtins
    at gimple time.  The solution is to use create_tmp_reg_or_ssa_name(), which
    knows when to create either an SSA or register temporary.
    
    2021-06-14  Peter Bergner  <bergner@linux.ibm.com>
    
    gcc/
            PR target/100777
            * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Use
            create_tmp_reg_or_ssa_name().
    
    gcc/testsuite/
            PR target/100777
            * gcc.target/powerpc/pr100777.c: New test.
    
    (cherry picked from commit 20073534c0ccca0a4e079c053ee0874af10b2ea0)

Diff:
---
 gcc/config/rs6000/rs6000-call.c             | 10 +++++-----
 gcc/testsuite/gcc.target/powerpc/pr100777.c | 24 ++++++++++++++++++++++++
 2 files changed, 29 insertions(+), 5 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 936c72c42c9..ec1b5966137 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -10858,7 +10858,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
       tree dst_ptr = gimple_call_arg (stmt, 0);
       tree src_ptr = gimple_call_arg (stmt, 1);
       tree src_type = TREE_TYPE (src_ptr);
-      tree src = make_ssa_name (TREE_TYPE (src_type));
+      tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type));
       gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq);
 
       /* If we are disassembling an accumulator/pair and our destination is
@@ -10882,7 +10882,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
 	{
 	  new_decl = rs6000_builtin_decls[MMA_BUILTIN_XXMFACC_INTERNAL];
 	  new_call = gimple_build_call (new_decl, 1, src);
-	  src = make_ssa_name (vector_quad_type_node);
+	  src = create_tmp_reg_or_ssa_name (vector_quad_type_node);
 	  gimple_call_set_lhs (new_call, src);
 	  gimple_seq_add_stmt (&new_seq, new_call);
 	}
@@ -10920,7 +10920,7 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
     {
       /* This built-in has a pass-by-reference accumulator input, so load it
 	 into a temporary accumulator for use as a pass-by-value input.  */
-      op[0] = make_ssa_name (vector_quad_type_node);
+      op[0] = create_tmp_reg_or_ssa_name (vector_quad_type_node);
       for (unsigned i = 1; i < nopnds; i++)
 	op[i] = gimple_call_arg (stmt, i);
       gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq);
@@ -10968,9 +10968,9 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi)
     }
 
   if (fncode == VSX_BUILTIN_BUILD_PAIR || fncode == VSX_BUILTIN_ASSEMBLE_PAIR)
-    lhs = make_ssa_name (vector_pair_type_node);
+    lhs = create_tmp_reg_or_ssa_name (vector_pair_type_node);
   else
-    lhs = make_ssa_name (vector_quad_type_node);
+    lhs = create_tmp_reg_or_ssa_name (vector_quad_type_node);
   gimple_call_set_lhs (new_call, lhs);
   gimple_seq_add_stmt (&new_seq, new_call);
   gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq);
diff --git a/gcc/testsuite/gcc.target/powerpc/pr100777.c b/gcc/testsuite/gcc.target/powerpc/pr100777.c
new file mode 100644
index 00000000000..15742f67d8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr100777.c
@@ -0,0 +1,24 @@
+/* PR target/100777 */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target fopenmp } */
+/* { dg-options "-O1 -mdejagnu-cpu=power10 -fopenmp" } */
+
+/* Verify we do not ICE on the following.  */
+
+void
+foo (__vector_quad *dst)
+{
+#pragma omp parallel
+  {
+    __builtin_mma_xxsetaccz (dst);
+  }
+}
+
+void
+bar (__vector_quad *dst, __vector_quad *src)
+{
+#pragma omp parallel
+  {
+    __builtin_mma_disassemble_acc (dst, src);
+  }
+}