From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id D0224383B426; Wed, 23 Jun 2021 19:16:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D0224383B426 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work056)] Revert patch. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work056 X-Git-Oldrev: 1f597e0024c1b30a5d3a0c77491f464d7235d53a X-Git-Newrev: 4755669c218f5f0ff7a3d6d98c6727d57ff22348 Message-Id: <20210623191635.D0224383B426@sourceware.org> Date: Wed, 23 Jun 2021 19:16:35 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Jun 2021 19:16:35 -0000 https://gcc.gnu.org/g:4755669c218f5f0ff7a3d6d98c6727d57ff22348 commit 4755669c218f5f0ff7a3d6d98c6727d57ff22348 Author: Michael Meissner Date: Wed Jun 23 15:16:02 2021 -0400 Revert patch. gcc/ 2021-06-22 Michael Meissner Revert patch. * config/rs6000/rs6000.md (load DImode constant spliters): Use int_reg_operand instead of int_reg_operand_not_pseudo so loading up large DImode constants happens before register allocation. Diff: --- gcc/config/rs6000/rs6000.md | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4160efa36cc..3ba0beaee32 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9404,32 +9404,29 @@ ; Some DImode loads are best done as a load of -1 followed by a mask ; instruction. (define_split - [(set (match_operand:DI 0 "int_reg_operand") + [(set (match_operand:DI 0 "int_reg_operand_not_pseudo") (match_operand:DI 1 "const_int_operand"))] "TARGET_POWERPC64 && num_insns_constant (operands[1], DImode) > 1 && !IN_RANGE (INTVAL (operands[1]), -0x80000000, 0xffffffff) && rs6000_is_valid_and_mask (operands[1], DImode)" - [(set (match_dup 2) + [(set (match_dup 0) (const_int -1)) (set (match_dup 0) - (and:DI (match_dup 2) + (and:DI (match_dup 0) (match_dup 1)))] -{ - operands[2] = ((can_create_pseudo_p ()) - ? gen_reg_rtx (DImode) - : operands[0]); -}) + "") ;; Split a load of a large constant into the appropriate five-instruction ;; sequence. Handle anything in a constant number of insns. ;; When non-easy constants can go in the TOC, this should use ;; easy_fp_constant predicate. (define_split - [(set (match_operand:DI 0 "int_reg_operand") + [(set (match_operand:DI 0 "int_reg_operand_not_pseudo") (match_operand:DI 1 "const_int_operand"))] "TARGET_POWERPC64 && num_insns_constant (operands[1], DImode) > 1" - [(pc)] + [(set (match_dup 0) (match_dup 2)) + (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))] { if (rs6000_emit_set_const (operands[0], operands[1])) DONE; @@ -9438,10 +9435,11 @@ }) (define_split - [(set (match_operand:DI 0 "int_reg_operand") + [(set (match_operand:DI 0 "int_reg_operand_not_pseudo") (match_operand:DI 1 "const_scalar_int_operand"))] "TARGET_POWERPC64 && num_insns_constant (operands[1], DImode) > 1" - [(pc)] + [(set (match_dup 0) (match_dup 2)) + (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))] { if (rs6000_emit_set_const (operands[0], operands[1])) DONE;