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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work059)] PR 100167: Fix vector long long multiply/divide tests on power10. Date: Wed, 7 Jul 2021 17:56:13 +0000 (GMT) [thread overview] Message-ID: <20210707175613.F35CF396E056@sourceware.org> (raw) https://gcc.gnu.org/g:5a25724c2ac33e0fdbe63ed0cc1c1fe1608574de commit 5a25724c2ac33e0fdbe63ed0cc1c1fe1608574de Author: Michael Meissner <meissner@linux.ibm.com> Date: Wed Jul 7 13:55:53 2021 -0400 PR 100167: Fix vector long long multiply/divide tests on power10. This patch updates the vector long long multiply and divide tests to supply the correct code information if power10 code generation is used. 2021-07-07 Michael Meissner <meissner@linux.ibm.com> gcc/testsuite/ PR testsuite/100167 * gcc.target/powerpc/fold-vec-div-longlong.c: * gcc.target/powerpc/fold-vec-mult-longlong.c: Fix expected code generation on power10. Diff: --- gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c | 7 +++++-- gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c index 312e984d3cc..f6a9b290ae5 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c @@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y) { return vec_div (x, y); } -/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */ + +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target { ! has_arch_pwr10 } } } } */ +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target { ! has_arch_pwr10 } } } } */ +/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target { has_arch_pwr10 } } } } */ +/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target { has_arch_pwr10 } } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c index 38dba9f5023..bd210e34801 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c @@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y) return vec_mul (x, y); } -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */ +/* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */
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