From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1922) id 91DF33861038; Mon, 12 Jul 2021 07:55:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 91DF33861038 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Prathamesh Kulkarni To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-2239] arm/98435: Missed optimization in expanding vector constructor. X-Act-Checkin: gcc X-Git-Author: prathamesh.kulkarni X-Git-Refname: refs/heads/master X-Git-Oldrev: 5f5fbb550af7d9d6cb56ae8f607fea0eccaa9295 X-Git-Newrev: 1e72c24d2f3b1427f5e117e371928e7af50d2036 Message-Id: <20210712075518.91DF33861038@sourceware.org> Date: Mon, 12 Jul 2021 07:55:18 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Jul 2021 07:55:18 -0000 https://gcc.gnu.org/g:1e72c24d2f3b1427f5e117e371928e7af50d2036 commit r12-2239-g1e72c24d2f3b1427f5e117e371928e7af50d2036 Author: prathamesh.kulkarni Date: Mon Jul 12 13:23:06 2021 +0530 arm/98435: Missed optimization in expanding vector constructor. The patch moves vec_init pattern from neon.md to vec-common.md, and adjusts the mode to VDQX to accomodate binary floats. Also, the pattern is additionally gated on VALID_MVE_MODE. gcc/ChangeLog: PR target/98435 * config/arm/neon.md (vec_init): Move to ... * config/arm/vec-common.md (vec_init): ... here. Change the pattern's mode to VDQX and gate it on VALID_MVE_MODE. gcc/testsuite/ChangeLog: PR target/98435 * gcc.target/arm/simd/pr98435.c: New test. Diff: --- gcc/config/arm/neon.md | 9 --------- gcc/config/arm/vec-common.md | 9 +++++++++ gcc/testsuite/gcc.target/arm/simd/pr98435.c | 15 +++++++++++++++ 3 files changed, 24 insertions(+), 9 deletions(-) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 81cc8d36d55..64365e0a909 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -458,15 +458,6 @@ [(set_attr "type" "neon_store1_one_lane_q,neon_to_gp_q")] ) -(define_expand "vec_init" - [(match_operand:VDQ 0 "s_register_operand") - (match_operand 1 "" "")] - "TARGET_NEON || TARGET_HAVE_MVE" -{ - neon_expand_vector_init (operands[0], operands[1]); - DONE; -}) - ;; Doubleword and quadword arithmetic. ;; NOTE: some other instructions also support 64-bit integer diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index f90afa4cdb9..68de4f0f943 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -702,3 +702,12 @@ DONE; } ) + +(define_expand "vec_init" + [(match_operand:VDQX 0 "s_register_operand") + (match_operand 1 "" "")] + "TARGET_NEON || (TARGET_HAVE_MVE && VALID_MVE_MODE (mode))" +{ + neon_expand_vector_init (operands[0], operands[1]); + DONE; +}) diff --git a/gcc/testsuite/gcc.target/arm/simd/pr98435.c b/gcc/testsuite/gcc.target/arm/simd/pr98435.c new file mode 100644 index 00000000000..0af8633fd56 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/pr98435.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math" } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mfloat-abi=softfp -march=armv8.2-a+bf16+fp16" } */ + +#include + +bfloat16x4_t f (bfloat16_t a) +{ + return (bfloat16x4_t) {a, a, a, a}; +} + +/* { dg-final { scan-assembler {\tvdup.16\td[0-9]+, r0} } } */ +/* { dg-final { scan-assembler {\tvmov\tr0, r1, d[0-9]+} } } */