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From: Prathamesh Kulkarni <prathamesh3492@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-2241] arm/66791: Replace builtins for unsigned and fp vmul_n intrinsics. Date: Mon, 12 Jul 2021 09:50:21 +0000 (GMT) [thread overview] Message-ID: <20210712095021.E028F3840009@sourceware.org> (raw) https://gcc.gnu.org/g:6785eb595981abd93ad85edcfdf1d2e43c0841f5 commit r12-2241-g6785eb595981abd93ad85edcfdf1d2e43c0841f5 Author: prathamesh.kulkarni <prathamesh.kulkarni@linaro.org> Date: Mon Jul 12 15:18:21 2021 +0530 arm/66791: Replace builtins for unsigned and fp vmul_n intrinsics. gcc/ChangeLog: PR target/66791 * config/arm/arm_neon.h (vmul_n_u32): Replace call to builtin with __a * __b. (vmulq_n_u32): Likewise. (vmul_n_f32): Gate __a * __b on __FAST_MATH__. (vmulq_n_f32): Likewise. (vmul_n_f16): Likewise. (vmulq_n_f16): Likewise. gcc/testsuite/ChangeLog: PR target/66791 * gcc.target/arm/armv8_2-fp16-neon-2.c: Adjust. Diff: --- gcc/config/arm/arm_neon.h | 24 ++++++++++++++++++---- gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c | 10 ++++----- 2 files changed, 25 insertions(+), 9 deletions(-) diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index f42a15f7912..41b596b5fc6 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -8384,21 +8384,25 @@ __extension__ extern __inline float32x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmul_n_f32 (float32x2_t __a, float32_t __b) { +#ifdef __FAST_MATH__ + return __a * __b; +#else return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, (__builtin_neon_sf) __b); +#endif } __extension__ extern __inline uint16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmul_n_u16 (uint16x4_t __a, uint16_t __b) { - return (uint16x4_t)__builtin_neon_vmul_nv4hi ((int16x4_t) __a, (__builtin_neon_hi) __b); + return __a * __b; } __extension__ extern __inline uint32x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmul_n_u32 (uint32x2_t __a, uint32_t __b) { - return (uint32x2_t)__builtin_neon_vmul_nv2si ((int32x2_t) __a, (__builtin_neon_si) __b); + return __a * __b; } __extension__ extern __inline int16x8_t @@ -8419,21 +8423,25 @@ __extension__ extern __inline float32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmulq_n_f32 (float32x4_t __a, float32_t __b) { +#ifdef __FAST_MATH__ + return __a * __b; +#else return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, (__builtin_neon_sf) __b); +#endif } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmulq_n_u16 (uint16x8_t __a, uint16_t __b) { - return (uint16x8_t)__builtin_neon_vmul_nv8hi ((int16x8_t) __a, (__builtin_neon_hi) __b); + return __a * __b; } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmulq_n_u32 (uint32x4_t __a, uint32_t __b) { - return (uint32x4_t)__builtin_neon_vmul_nv4si ((int32x4_t) __a, (__builtin_neon_si) __b); + return __a * __b; } __extension__ extern __inline int32x4_t @@ -17740,7 +17748,11 @@ __extension__ extern __inline float16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmul_n_f16 (float16x4_t __a, float16_t __b) { +#ifdef __FAST_MATH__ + return __a * __b; +#else return __builtin_neon_vmul_nv4hf (__a, __b); +#endif } __extension__ extern __inline float16x8_t @@ -17765,7 +17777,11 @@ __extension__ extern __inline float16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vmulq_n_f16 (float16x8_t __a, float16_t __b) { +#ifdef __FAST_MATH__ + return __a * __b; +#else return __builtin_neon_vmul_nv8hf (__a, __b); +#endif } __extension__ extern __inline float16x4_t diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c index 50f689352ca..6808576ce59 100644 --- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c +++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c @@ -327,13 +327,13 @@ BINOP_TEST (vminnm) BINOP_TEST (vmul) /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } } - { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ BINOP_LANE_TEST (vmul, 2) /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[2\]} 1 } } { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[2\]} 1 } } */ BINOP_N_TEST (vmul) -/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[0\]} 1 } } - { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[0\]} 1 } }*/ +/* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } } + { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } }*/ float16x4_t test_vpadd_16x4 (float16x4_t a, float16x4_t b) @@ -387,7 +387,7 @@ test_vdup_n_f16 (float16_t a) { return vdup_n_f16 (a); } -/* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 3 } } */ float16x8_t test_vmovq_n_f16 (float16_t a) @@ -400,7 +400,7 @@ test_vdupq_n_f16 (float16_t a) { return vdupq_n_f16 (a); } -/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 } } */ float16x4_t test_vdup_lane_f16 (float16x4_t a)
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