[gcc r12-2706] rs6000: Add test for _mm_minpos_epu16

[Paul Clarke <pc@gcc.gnu.org>]

https://gcc.gnu.org/g:0f44b097321c42ba8f9301f369a9799424aa6d46

commit r12-2706-g0f44b097321c42ba8f9301f369a9799424aa6d46
Author: Paul A. Clarke <pc@us.ibm.com>
Date:   Mon Feb 22 19:20:48 2021 -0600

    rs6000: Add test for _mm_minpos_epu16
    
    Copy the test for _mm_minpos_epu16 from
    gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c, with
    a few adjustments:
    
    - Adjust the dejagnu directives for powerpc platform.
    - Make the data not be monotonically increasing,
      such that some of the returned values are not
      always the first value (index 0).
    - Create a list of input data testing various scenarios
      including more than one minimum value and different
      orders and indices of the minimum value.
    - Fix a masking issue where the index was being truncated
      to 2 bits instead of 3 bits, which wasn't found because
      all of the returned indices were 0 with the original
      generated data.
    - Support big-endian.
    
    2021-08-03  Paul A. Clarke  <pc@us.ibm.com>
    
    gcc/testsuite
            * gcc.target/powerpc/sse4_1-phminposuw.c: Copy from
            gcc/testsuite/gcc.target/i386, adjust dg directives to suit,
            make more robust.

Diff:
---
 .../gcc.target/powerpc/sse4_1-phminposuw.c         | 68 ++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c
new file mode 100644
index 00000000000..146df24777a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-phminposuw.c
@@ -0,0 +1,68 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mvsx -Wno-psabi" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+
+#define NO_WARN_X86_INTRINSICS 1
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define DIM(a) (sizeof (a) / sizeof (a)[0])
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x;
+      unsigned short s[8];
+    } src[] =
+    {
+      { .s = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 } },
+      { .s = { 0x0000, 0xffff, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 } },
+      { .s = { 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff } },
+      { .s = { 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008 } },
+      { .s = { 0x0008, 0x0007, 0x0006, 0x0005, 0x0004, 0x0003, 0x0002, 0x0001 } },
+      { .s = { 0xfff4, 0xfff3, 0xfff2, 0xfff1, 0xfff3, 0xfff1, 0xfff2, 0xfff3 } }
+    };
+  unsigned short minVal[DIM (src)];
+  int minInd[DIM (src)];
+  unsigned short minValScalar, minIndScalar;
+  int i, j;
+  union
+    {
+      int si;
+      unsigned short s[2];
+    } res;
+
+  for (i = 0; i < DIM (src); i++)
+    {
+      res.si = _mm_cvtsi128_si32 (_mm_minpos_epu16 (src[i].x));
+      minVal[i] = res.s[0];
+      minInd[i] = res.s[1] & 0b111;
+    }
+
+  for (i = 0; i < DIM (src); i++)
+    {
+      minValScalar = src[i].s[0];
+      minIndScalar = 0;
+
+      for (j = 1; j < 8; j++)
+	if (minValScalar > src[i].s[j])
+	  {
+	    minValScalar = src[i].s[j];
+	    minIndScalar = j;
+	  }
+
+      if (minValScalar != minVal[i] && minIndScalar != minInd[i])
+	abort ();
+    }
+}