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From: hongtao Liu <liuhongt@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-2752] Support cond_{smax, smin} for vector float/double modes under AVX512. Date: Thu, 5 Aug 2021 01:12:11 +0000 (GMT) [thread overview] Message-ID: <20210805011211.15EBB398304D@sourceware.org> (raw) https://gcc.gnu.org/g:f7aa81892eb54bc040ee6f7fd6134d800a5ee89c commit r12-2752-gf7aa81892eb54bc040ee6f7fd6134d800a5ee89c Author: liuhongt <hongtao.liu@intel.com> Date: Wed Aug 4 18:15:43 2021 +0800 Support cond_{smax,smin} for vector float/double modes under AVX512. gcc/ChangeLog: * config/i386/sse.md (cond_<code><mode>): New expander. gcc/testsuite/ChangeLog: * gcc.target/i386/cond_op_maxmin_double-1.c: New test. * gcc.target/i386/cond_op_maxmin_double-2.c: New test. * gcc.target/i386/cond_op_maxmin_float-1.c: New test. * gcc.target/i386/cond_op_maxmin_float-2.c: New test. Diff: --- gcc/config/i386/sse.md | 18 ++++++ .../gcc.target/i386/cond_op_maxmin_double-1.c | 39 +++++++++++++ .../gcc.target/i386/cond_op_maxmin_double-2.c | 67 ++++++++++++++++++++++ .../gcc.target/i386/cond_op_maxmin_float-1.c | 8 +++ .../gcc.target/i386/cond_op_maxmin_float-2.c | 5 ++ 5 files changed, 137 insertions(+) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6035411ea75..51733a3849d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2376,6 +2376,24 @@ (set_attr "prefix" "orig,vex") (set_attr "mode" "SF")]) +(define_expand "cond_<code><mode>" + [(set (match_operand:VF 0 "register_operand") + (vec_merge:VF + (smaxmin:VF + (match_operand:VF 2 "vector_operand") + (match_operand:VF 3 "vector_operand")) + (match_operand:VF 4 "nonimm_or_0_operand") + (match_operand:<avx512fmaskmode> 1 "register_operand")))] + "<MODE_SIZE> == 64 || TARGET_AVX512VL" +{ + emit_insn (gen_<code><mode>3_mask (operands[0], + operands[2], + operands[3], + operands[4], + operands[1])); + DONE; +}) + (define_expand "<code><mode>3<mask_name><round_saeonly_name>" [(set (match_operand:VF 0 "register_operand") (smaxmin:VF diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c new file mode 100644 index 00000000000..eda8e1974b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake-avx512 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump ".COND_MAX" "optimized" } } */ +/* { dg-final { scan-tree-dump ".COND_MIN" "optimized" } } */ +/* { dg-final { scan-assembler-times "vmaxpd" 1 } } */ +/* { dg-final { scan-assembler-times "vminpd" 1 } } */ + +#include<math.h> +#ifndef NUM +#define NUM 800 +#endif +#ifndef TYPE +#define TYPE double +#endif +#ifndef FN_MAX +#define FN_MAX fmax +#endif +#ifndef FN_MIN +#define FN_MIN fmin +#endif + +TYPE a[NUM], b[NUM], c[NUM], d[NUM], e[NUM], j[NUM]; +#define MAX FN_MAX +#define MIN FN_MIN + +#define BIN(OPNAME, OP) \ + void \ + __attribute__ ((noipa,optimize ("Ofast"))) \ + foo_##OPNAME () \ + { \ + for (int i = 0; i != NUM; i++) \ + if (b[i] < c[i]) \ + a[i] = (OP (d[i], e[i])); \ + else \ + a[i] = d[i] - e[i]; \ + } + +BIN (max, MAX); +BIN (min, MIN); diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c new file mode 100644 index 00000000000..c50a831000a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c @@ -0,0 +1,67 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256 -ffast-math" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512VL +#ifndef CHECK +#define CHECK "avx512f-helper.h" +#endif + +#include CHECK + +#include "cond_op_maxmin_double-1.c" +#define BINO2(OPNAME, OP) \ + void \ + __attribute__ ((noipa)) \ + foo_o2_##OPNAME () \ + { \ + for (int i = 0; i != NUM; i++) \ + if (b[i] < c[i]) \ + j[i] = OP(d[i], e[i]); \ + else \ + j[i] = d[i] - e[i]; \ + } + +BINO2 (max, MAX); +BINO2 (min, MIN); + +static void +test_256 (void) +{ + int sign = -1; + for (int i = 0; i != NUM; i++) + { + a[i] = 0; + d[i] = i * 2; + e[i] = i * i * 3 - i * 9 + 153; + b[i] = i * 83; + c[i] = b[i] + sign; + sign *= -1; + j[i] = 1; + } + foo_max (); + foo_o2_max (); + for (int i = 0; i != NUM; i++) + { + if (a[i] != j[i]) + abort (); + a[i] = 0; + b[i] = 1; + } + + foo_min (); + foo_o2_min (); + for (int i = 0; i != NUM; i++) + { + if (a[i] != j[i]) + abort (); + a[i] = 0; + j[i] = 1; + } +} + +static void +test_128 () +{ + +} diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c new file mode 100644 index 00000000000..2d2157d87a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=skylake-avx512 -DTYPE=float -fdump-tree-optimized -DFN_MAX=fmaxf -DFN_MIN=fminf" } */ +/* { dg-final { scan-tree-dump ".COND_MAX" "optimized" } } */ +/* { dg-final { scan-tree-dump ".COND_MIN" "optimized" } } */ +/* { dg-final { scan-assembler-times "vmaxps" 1 } } */ +/* { dg-final { scan-assembler-times "vminps" 1 } } */ + +#include "cond_op_maxmin_double-1.c" diff --git a/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c new file mode 100644 index 00000000000..fec784e5ded --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256 -DTYPE=float -DFN_MAX=fmaxf -DFN_MIN=fminf" } */ +/* { dg-require-effective-target avx512vl } */ + +#include "cond_op_maxmin_double-2.c"
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