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From: Iain D Sandoe <iains@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc/devel/c++-coroutines] (27 commits) Merge master r12-2772.
Date: Thu, 5 Aug 2021 19:21:23 +0000 (GMT) [thread overview]
Message-ID: <20210805192123.2A81A385841A@sourceware.org> (raw)
The branch 'devel/c++-coroutines' was updated to point to:
a6dc097e0dd... Merge master r12-2772.
It previously pointed to:
ce6a284fdc2... Merge master r12-2746.
Diff:
Summary of changes (added commits):
-----------------------------------
a6dc097... Merge master r12-2772.
4739344... libcpp: Regenerate ucnid.h using Unicode 13.0.0 files [PR10 (*)
4805b92... libcpp: Fix makeucnid bug with combining values [PR100977] (*)
02e5ffd... libgcc: Honor LDFLAGS_FOR_TARGET when linking libgcc_s (*)
0bac793... openmp: Implement omp_get_device_num routine (*)
8dec72a... libstdc++: Add [[nodiscard]] to <compare> (*)
03d47da... testsuite: Fix warning introduced by nodiscard in libstdc++ (*)
7b1de3e... libstdc++: Move attributes that follow requires-clauses [PR (*)
72264a6... <x86gprintrin.h>: Add pragma GCC target("general-regs-only" (*)
c04bb6d... doc: Document cond_* shift optabs in md.texi (*)
783d809... vect: Move costing helpers from aarch64 code (*)
c1cdabe... arm: reorder assembler architecture directives [PR101723] (*)
6a37d03... arm: Don't reconfigure globals in arm_configure_build_targe (*)
62e66c6... arm: ensure the arch_name is always set for the build targe (*)
0c3aab7... aarch64: Don't include vec_select high-half in SIMD subtrac (*)
8cd27a3... aarch64: Don't include vec_select high-half in SIMD add cos (*)
f0fc1e6... Adjust gcc.dg/vect/bb-slp-pr101756.c (*)
d0a5624... cfgloop: Make loops_list support an optional loop_p root (*)
4e3129b... Fix oversight in handling of reverse SSO in SRA pass (*)
ac8a2fb... compiler: make escape analysis more robust about builtin fu (*)
c16f21c... Support cond_{xor,ior,and} for vector integer mode under AV (*)
f7aa818... Support cond_{smax,smin} for vector float/double modes unde (*)
9a8c3fc... Support cond_{smax,smin,umax,umin} for vector integer modes (*)
2697f83... Daily bump. (*)
ded2c2c... analyzer: initial implementation of asm support [PR101570] (*)
5738a64... x86: Update STORE_MAX_PIECES (*)
09dba01... x86: Avoid stack realignment when copying data with SSE reg (*)
(*) This commit already exists in another branch.
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