From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1035) id AA7BA385843D; Tue, 24 Aug 2021 10:58:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AA7BA385843D MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Earnshaw To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-3114] arm: fix vlldm erratum for Armv8.1-m [PR102035] X-Act-Checkin: gcc X-Git-Author: Richard Earnshaw X-Git-Refname: refs/heads/master X-Git-Oldrev: 574e7950bd6b34e9e2cacce18c802b45505d1d0a X-Git-Newrev: 30461cf8dba3d3adb15a125e4da48800eb2b9b8f Message-Id: <20210824105832.AA7BA385843D@sourceware.org> Date: Tue, 24 Aug 2021 10:58:32 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Aug 2021 10:58:32 -0000 https://gcc.gnu.org/g:30461cf8dba3d3adb15a125e4da48800eb2b9b8f commit r12-3114-g30461cf8dba3d3adb15a125e4da48800eb2b9b8f Author: Richard Earnshaw Date: Fri Jun 18 17:18:37 2021 +0100 arm: fix vlldm erratum for Armv8.1-m [PR102035] For Armv8.1-m we generate code that emits VLLDM directly and do not rely on support code in the library, so emit the mitigation directly as well, when required. In this case, we can use the compiler options to determine when to apply the fix and when it is safe to omit it. gcc: PR target/102035 * config/arm/arm.md (attribute arch): Add fix_vlldm. (arch_enabled): Use it. * config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to use when erratum mitigation is needed. Diff: --- gcc/config/arm/arm.md | 11 +++++++++-- gcc/config/arm/vfp.md | 10 +++++++--- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 064604808cc..5d3f21b91c4 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -132,9 +132,12 @@ ; TARGET_32BIT, "t1" or "t2" to specify a specific Thumb mode. "v6" ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without ; arm_arch6. "v6t2" for Thumb-2 with arm_arch6 and "v8mb" for ARMv8-M -; Baseline. This attribute is used to compute attribute "enabled", +; Baseline. "fix_vlldm" is for fixing the v8-m/v8.1-m VLLDM erratum. +; This attribute is used to compute attribute "enabled", ; use type "any" to enable an alternative in all cases. -(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,v8mb,iwmmxt,iwmmxt2,armv6_or_vfpv3,neon,mve" +(define_attr "arch" "any, a, t, 32, t1, t2, v6,nov6, v6t2, \ + v8mb, fix_vlldm, iwmmxt, iwmmxt2, armv6_or_vfpv3, \ + neon, mve" (const_string "any")) (define_attr "arch_enabled" "no,yes" @@ -177,6 +180,10 @@ (match_test "TARGET_THUMB1 && arm_arch8")) (const_string "yes") + (and (eq_attr "arch" "fix_vlldm") + (match_test "fix_vlldm")) + (const_string "yes") + (and (eq_attr "arch" "iwmmxt2") (match_test "TARGET_REALLY_IWMMXT2")) (const_string "yes") diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 9961f9389fe..f0030a8c36a 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -1720,11 +1720,15 @@ (define_insn "lazy_load_multiple_insn" [(unspec_volatile - [(mem:BLK (match_operand:SI 0 "s_register_operand" "rk"))] + [(mem:BLK (match_operand:SI 0 "s_register_operand" "rk,rk"))] VUNSPEC_VLLDM)] "use_cmse && reload_completed" - "vlldm%?\\t%0" - [(set_attr "predicable" "yes") + "@ + vscclrm\\t{vpr}\;vlldm\\t%0 + vlldm\\t%0" + [(set_attr "arch" "fix_vlldm,*") + (set_attr "predicable" "no") + (set_attr "length" "8,4") (set_attr "type" "load_4")] )