From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2078) id 1CF72384A8B4; Fri, 10 Sep 2021 07:00:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1CF72384A8B4 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: hongtao Liu To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-3441] AVX512FP16: Add testcase for vmaxph/vmaxsh/vminph/vminsh. X-Act-Checkin: gcc X-Git-Author: liuhongt X-Git-Refname: refs/heads/master X-Git-Oldrev: b96cb2caa973d26c4f27da91c44e35796f411e4a X-Git-Newrev: 98da680f69333ca2cfeab62cd7aa96209e3382c6 Message-Id: <20210910070050.1CF72384A8B4@sourceware.org> Date: Fri, 10 Sep 2021 07:00:50 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Sep 2021 07:00:50 -0000 https://gcc.gnu.org/g:98da680f69333ca2cfeab62cd7aa96209e3382c6 commit r12-3441-g98da680f69333ca2cfeab62cd7aa96209e3382c6 Author: liuhongt Date: Mon Mar 2 16:46:43 2020 +0800 AVX512FP16: Add testcase for vmaxph/vmaxsh/vminph/vminsh. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vmaxph-1a.c: New test. * gcc.target/i386/avx512fp16-vmaxph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vmaxsh-1.c: Ditto. * gcc.target/i386/avx512fp16-vmaxsh-1b.c: Ditto. * gcc.target/i386/avx512fp16-vminph-1a.c: Ditto. * gcc.target/i386/avx512fp16-vminph-1b.c: Ditto. * gcc.target/i386/avx512fp16-vminsh-1.c: Ditto. * gcc.target/i386/avx512fp16-vminsh-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vmaxph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vmaxph-1b.c: Ditto. * gcc.target/i386/avx512fp16vl-vminph-1a.c: Ditto. * gcc.target/i386/avx512fp16vl-vminph-1b.c: Ditto. Diff: --- .../gcc.target/i386/avx512fp16-vmaxph-1a.c | 26 ++++++ .../gcc.target/i386/avx512fp16-vmaxph-1b.c | 94 ++++++++++++++++++++++ .../gcc.target/i386/avx512fp16-vmaxsh-1.c | 27 +++++++ .../gcc.target/i386/avx512fp16-vmaxsh-1b.c | 72 +++++++++++++++++ .../gcc.target/i386/avx512fp16-vminph-1a.c | 26 ++++++ .../gcc.target/i386/avx512fp16-vminph-1b.c | 93 +++++++++++++++++++++ .../gcc.target/i386/avx512fp16-vminsh-1.c | 27 +++++++ .../gcc.target/i386/avx512fp16-vminsh-1b.c | 72 +++++++++++++++++ .../gcc.target/i386/avx512fp16vl-vmaxph-1a.c | 29 +++++++ .../gcc.target/i386/avx512fp16vl-vmaxph-1b.c | 16 ++++ .../gcc.target/i386/avx512fp16vl-vminph-1a.c | 29 +++++++ .../gcc.target/i386/avx512fp16vl-vminph-1b.c | 16 ++++ 12 files changed, 527 insertions(+) diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1a.c new file mode 100644 index 00000000000..b91f4bd1154 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1a.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m512h res, res1, res2; +volatile __m512h x1, x2; +volatile __mmask32 m32; + +void extern +avx512f_test (void) +{ + res = _mm512_max_ph (x1, x2); + res1 = _mm512_mask_max_ph (res1, m32, x1, x2); + res2 = _mm512_maskz_max_ph (m32, x1, x2); + + res = _mm512_max_round_ph (x1, x2, 8); + res1 = _mm512_mask_max_round_ph (res1, m32, x1, x2, 8); + res2 = _mm512_maskz_max_round_ph (m32, x1, x2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1b.c new file mode 100644 index 00000000000..0dd4c11e9aa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxph-1b.c @@ -0,0 +1,94 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 16) + +void NOINLINE +EMULATE(max_ph) (V512 * dest, V512 op1, V512 op2, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + m2 = (k >> 16) & 0xffff; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + for (i = 0; i < 16; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.f32[i] = 0; + } + else { + v5.u32[i] = v7.u32[i]; + } + } + else { + v5.f32[i] = v1.f32[i] > v3.f32[i] ? v1.f32[i] : v3.f32[i]; + } + + if (((1 << i) & m2) == 0) { + if (zero_mask) { + v6.f32[i] = 0; + } + else { + v6.u32[i] = v8.u32[i]; + } + } + else { + v6.f32[i] = v2.f32[i] > v4.f32[i] ? v2.f32[i] : v4.f32[i]; + } + } + *dest = pack_twops_2ph(v5, v6); +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(max_ph) (&exp, src1, src2, NET_MASK, 0); + HF(res) = INTRINSIC (_max_ph) (HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _max_ph); + + init_dest(&res, &exp); + EMULATE(max_ph) (&exp, src1, src2, MASK_VALUE, 0); + HF(res) = INTRINSIC (_mask_max_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_max_ph); + + EMULATE(max_ph) (&exp, src1, src2, ZMASK_VALUE, 1); + HF(res) = INTRINSIC (_maskz_max_ph) (ZMASK_VALUE, HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_max_ph); + +#if AVX512F_LEN == 512 + EMULATE(max_ph) (&exp, src1, src2, NET_MASK, 0); + HF(res) = INTRINSIC (_max_round_ph) (HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _max_ph); + + init_dest(&res, &exp); + EMULATE(max_ph) (&exp, src1, src2, MASK_VALUE, 0); + HF(res) = INTRINSIC (_mask_max_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_max_ph); + + EMULATE(max_ph) (&exp, src1, src2, ZMASK_VALUE, 1); + HF(res) = INTRINSIC (_maskz_max_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_max_ph); + +#endif + + if (n_errs != 0) { + abort (); + } +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1.c new file mode 100644 index 00000000000..d5198dcebdc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h res; +volatile __m128h x1, x2; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res = _mm_max_sh (x1, x2); + res = _mm_mask_max_sh (res, m8, x1, x2); + res = _mm_maskz_max_sh (m8, x1, x2); + + res = _mm_max_round_sh (x1, x2, 8); + res = _mm_mask_max_round_sh (res, m8, x1, x2, 8); + res = _mm_maskz_max_round_sh (m8, x1, x2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1b.c new file mode 100644 index 00000000000..fe49de3147f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmaxsh-1b.c @@ -0,0 +1,72 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_max_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[i] = v1.f32[i] > v3.f32[i] ? v1.f32[i] : v3.f32[i]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + + for (i = 1; i < 8; i++) + v5.f32[i] = v1.f32[i]; + + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + + emulate_max_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_max_sh(src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_max_sh"); + + init_dest(&res, &exp); + emulate_max_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_mask_max_sh(res.xmmh[0], 0x1, src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_max_sh"); + + emulate_max_sh(&exp, src1, src2, 0x3, 1); + res.xmmh[0] = _mm_maskz_max_sh(0x3, src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_max_sh"); + + emulate_max_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_max_round_sh(src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_max_round_sh"); + + init_dest(&res, &exp); + emulate_max_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_mask_max_round_sh(res.xmmh[0], 0x1, src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_mask_max_round_sh"); + + emulate_max_sh(&exp, src1, src2, 0x3, 1); + res.xmmh[0] = _mm_maskz_max_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_max_round_sh"); + + if (n_errs != 0) + abort (); +} + + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1a.c new file mode 100644 index 00000000000..810a93e3870 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1a.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m512h res, res1, res2; +volatile __m512h x1, x2; +volatile __mmask32 m32; + +void extern +avx512f_test (void) +{ + res = _mm512_min_ph (x1, x2); + res1 = _mm512_mask_min_ph (res1, m32, x1, x2); + res2 = _mm512_maskz_min_ph (m32, x1, x2); + + res = _mm512_min_round_ph (x1, x2, 8); + res1 = _mm512_mask_min_round_ph (res1, m32, x1, x2, 8); + res2 = _mm512_maskz_min_round_ph (m32, x1, x2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1b.c new file mode 100644 index 00000000000..3315ce13813 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vminph-1b.c @@ -0,0 +1,93 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS (AVX512F_LEN / 16) + +void NOINLINE +EMULATE(min_ph) (V512 * dest, V512 op1, V512 op2, + __mmask32 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + __mmask16 m1, m2; + + m1 = k & 0xffff; + m2 = (k >> 16) & 0xffff; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + for (i = 0; i < 16; i++) { + if (((1 << i) & m1) == 0) { + if (zero_mask) { + v5.f32[i] = 0; + } + else { + v5.u32[i] = v7.u32[i]; + } + } + else { + v5.f32[i] = v1.f32[i] < v3.f32[i] ? v1.f32[i] : v3.f32[i]; + } + + if (((1 << i) & m2) == 0) { + if (zero_mask) { + v6.f32[i] = 0; + } + else { + v6.u32[i] = v8.u32[i]; + } + } + else { + v6.f32[i] = v2.f32[i] < v4.f32[i] ? v2.f32[i] : v4.f32[i]; + } + } + *dest = pack_twops_2ph(v5, v6); +} + +void +TEST (void) +{ + V512 res; + V512 exp; + + init_src(); + + EMULATE(min_ph) (&exp, src1, src2, NET_MASK, 0); + HF(res) = INTRINSIC (_min_ph) (HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _min_ph); + + init_dest(&res, &exp); + EMULATE(min_ph) (&exp, src1, src2, MASK_VALUE, 0); + HF(res) = INTRINSIC (_mask_min_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_min_ph); + + EMULATE(min_ph) (&exp, src1, src2, ZMASK_VALUE, 1); + HF(res) = INTRINSIC (_maskz_min_ph) (ZMASK_VALUE, HF(src1), HF(src2)); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_min_ph); + +#if AVX512F_LEN == 512 + EMULATE(min_ph) (&exp, src1, src2, NET_MASK, 0); + HF(res) = INTRINSIC (_min_round_ph) (HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _min_ph); + + init_dest(&res, &exp); + EMULATE(min_ph) (&exp, src1, src2, MASK_VALUE, 0); + HF(res) = INTRINSIC (_mask_min_round_ph) (HF(res), MASK_VALUE, HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _mask_min_ph); + + EMULATE(min_ph) (&exp, src1, src2, ZMASK_VALUE, 1); + HF(res) = INTRINSIC (_maskz_min_round_ph) (ZMASK_VALUE, HF(src1), HF(src2), 8); + CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_min_ph); +#endif + + if (n_errs != 0) { + abort (); + } +} + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1.c new file mode 100644 index 00000000000..9f1d6e7da4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminsh\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128h res; +volatile __m128h x1, x2; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res = _mm_min_sh (x1, x2); + res = _mm_mask_min_sh (res, m8, x1, x2); + res = _mm_maskz_min_sh (m8, x1, x2); + + res = _mm_min_round_sh (x1, x2, 8); + res = _mm_mask_min_round_sh (res, m8, x1, x2, 8); + res = _mm_maskz_min_round_sh (m8, x1, x2, 8); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1b.c new file mode 100644 index 00000000000..13b8d86689c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vminsh-1b.c @@ -0,0 +1,72 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */ + + +#define AVX512FP16 +#include "avx512fp16-helper.h" + +#define N_ELEMS 8 + +void NOINLINE +emulate_min_sh(V512 * dest, V512 op1, V512 op2, + __mmask8 k, int zero_mask) +{ + V512 v1, v2, v3, v4, v5, v6, v7, v8; + int i; + + unpack_ph_2twops(op1, &v1, &v2); + unpack_ph_2twops(op2, &v3, &v4); + unpack_ph_2twops(*dest, &v7, &v8); + + if ((k&1) || !k) + v5.f32[i] = v1.f32[i] < v3.f32[i] ? v1.f32[i] : v3.f32[i]; + else if (zero_mask) + v5.f32[0] = 0; + else + v5.f32[0] = v7.f32[0]; + + for (i = 1; i < 8; i++) + v5.f32[i] = v1.f32[i]; + + *dest = pack_twops_2ph(v5, v6); +} + +void +test_512 (void) +{ + V512 res; + V512 exp; + + init_src(); + + emulate_min_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_min_sh(src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_min_sh"); + + init_dest(&res, &exp); + emulate_min_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_mask_min_sh(res.xmmh[0], 0x1, src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_mask_min_sh"); + + emulate_min_sh(&exp, src1, src2, 0x3, 1); + res.xmmh[0] = _mm_maskz_min_sh(0x3, src1.xmmh[0], src2.xmmh[0]); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_min_sh"); + + emulate_min_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_min_round_sh(src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_min_round_sh"); + + init_dest(&res, &exp); + emulate_min_sh(&exp, src1, src2, 0x1, 0); + res.xmmh[0] = _mm_mask_min_round_sh(res.xmmh[0], 0x1, src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_mask_min_round_sh"); + + emulate_min_sh(&exp, src1, src2, 0x3, 1); + res.xmmh[0] = _mm_maskz_min_round_sh(0x3, src1.xmmh[0], src2.xmmh[0], 8); + check_results(&res, &exp, N_ELEMS, "_mm_maskz_min_round_sh"); + + if (n_errs != 0) + abort (); +} + + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1a.c new file mode 100644 index 00000000000..adadc4ed8d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1a.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256h res1; +volatile __m128h res2; +volatile __m256h x1,x2; +volatile __m128h x3, x4; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res1 = _mm256_max_ph (x1, x2); + res1 = _mm256_mask_max_ph (res1, m16, x1, x2); + res1 = _mm256_maskz_max_ph (m16, x1, x2); + + res2 = _mm_max_ph (x3, x4); + res2 = _mm_mask_max_ph (res2, m8, x3, x4); + res2 = _mm_maskz_max_ph (m8, x3, x4); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1b.c new file mode 100644 index 00000000000..f9a3b70d47c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vmaxph-1b.c @@ -0,0 +1,16 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define DEBUG +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vmaxph-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vmaxph-1b.c" + diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1a.c new file mode 100644 index 00000000000..7909541aa34 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1a.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vminph\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256h res1; +volatile __m128h res2; +volatile __m256h x1,x2; +volatile __m128h x3, x4; +volatile __mmask16 m16; +volatile __mmask8 m8; + +void extern +avx512f_test (void) +{ + res1 = _mm256_min_ph (x1, x2); + res1 = _mm256_mask_min_ph (res1, m16, x1, x2); + res1 = _mm256_maskz_min_ph (m16, x1, x2); + + res2 = _mm_min_ph (x3, x4); + res2 = _mm_mask_min_ph (res2, m8, x3, x4); + res2 = _mm_maskz_min_ph (m8, x3, x4); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1b.c new file mode 100644 index 00000000000..98808b0eddd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vminph-1b.c @@ -0,0 +1,16 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ + +#define DEBUG +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vminph-1b.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512fp16-vminph-1b.c" +