From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2049) id 6F2333858423; Tue, 21 Sep 2021 09:15:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6F2333858423 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Matthew Malcomson To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/morello)] Attempt to update AAPCS testsuite framework for PureCap X-Act-Checkin: gcc X-Git-Author: Matthew Malcomson X-Git-Refname: refs/vendors/ARM/heads/morello X-Git-Oldrev: a95417c683681fea6876cc70fcc1c34beb751e80 X-Git-Newrev: f84afd62940d692bd23aea9551b0c9ec33cbbfb3 Message-Id: <20210921091521.6F2333858423@sourceware.org> Date: Tue, 21 Sep 2021 09:15:21 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Sep 2021 09:15:21 -0000 https://gcc.gnu.org/g:f84afd62940d692bd23aea9551b0c9ec33cbbfb3 commit f84afd62940d692bd23aea9551b0c9ec33cbbfb3 Author: Matthew Malcomson Date: Thu Sep 16 11:34:03 2021 +0100 Attempt to update AAPCS testsuite framework for PureCap This can't really be tested at the moment, but it should provide tests which we can make sure work in the future. It does not look like we need very many changes. We need to add assembly to record the C registers when targetting PureCap, adjust the value of the STACK macro accordingly depending on whether these C registers have been saved, use __UINTPTR_TYPE__ a few times, and adjust some inline assembly. Using this new framework for actually checking PureCap PCS is not possible until we have execution tests in the testsuite, but we can check this adjustment has not broken running standard AArch64 tests. Diff: --- .../gcc.target/aarch64/aapcs64/abitest-2.h | 24 +++++-- .../gcc.target/aarch64/aapcs64/abitest-common.h | 17 ++++- gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S | 77 ++++++++++++++++++++++ 3 files changed, 112 insertions(+), 6 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h index 57492197e5f..6ab563b6d1d 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h @@ -5,7 +5,7 @@ #include "validate_memory.h" void (*testfunc_ptr)(char* stack); -unsigned long long saved_return_address; +__UINTPTR_TYPE__ saved_return_address; /* Helper macros to generate function name. Example of the function name: func_return_val_1. */ @@ -39,10 +39,12 @@ void TEST_FUNC_NAME(id)(char* stack) \ type __x = val; \ char* addr; \ DUMP_STATUS(type,val) \ - if (offset != X8) \ + if (offset != X8 && offset != C8) \ addr = stack + offset; \ - else \ + else if (offset == X8) \ addr = *(char **)(stack + X8); \ + else if (offset == C8) \ + addr = *(char **)(stack + C8); \ if (validate_memory (&__x, addr, sizeof (type), layout) != 0) \ abort(); \ } @@ -65,6 +67,15 @@ MYFUNCTYPE myfunc () PCSATTR; parameter list are two dummy parameters to help improve the detection of bugs like a short vector being returned in X0 after copied from V0. */ #undef FUNC_VAL_CHECK + +#ifdef __CHERI_PURE_CAPABILITY__ +#define GET_LR "mov %0, c30" +#define SET_LR "mov c30, %0" +#else +#define GET_LR "mov %0, x30" +#define SET_LR "mov x30, %0" +#endif + #define FUNC_VAL_CHECK(id, type, var, offset, layout) \ __attribute__ ((noinline)) type FUNC_NAME (id) (int i, double d, type t) \ { \ @@ -81,12 +92,15 @@ __attribute__ ((noinline)) type FUNC_NAME (id) (int i, double d, type t) \ this function does not guarantee myfunc see the exact register \ content, as compiler may emit code in between the two calls, \ especially during the -O0 codegen. */ \ - asm volatile ("mov %0, x30" : "=r" (saved_return_address)); \ - asm volatile ("mov x30, %0" : : "r" ((unsigned long long) myfunc)); \ + asm volatile (GET_LR : "=r" (saved_return_address)); \ + asm volatile (SET_LR : : "r" ((__UINTPTR_TYPE__) myfunc)); \ return t; \ } #include TESTFILE +#undef GET_LR +#undef SET_LR + /* Call the function to return value and call the checking function to validate. See the comment above for the reason of having 0 and 0.0 diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h index 138de7321e9..ba84e19ba47 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h @@ -66,8 +66,23 @@ #define H6 348 #define H7 350 - +#define C0 352 +#define C1 368 +#define C2 384 +#define C3 400 +#define C4 416 +#define C5 432 +#define C6 448 +#define C7 464 +#define C8 480 +#define C9 496 + + +#ifdef __CHERI_PURE_CAPABILITY__ +#define STACK 512 +#else #define STACK 352 +#endif /* The type of test. 'myfunc' in abitest.S needs to know which kind of test it is running to decide what to do at the runtime. Keep the diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S index 893e68cb994..623ef9bacbe 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S @@ -9,6 +9,82 @@ #define PTR_REG(n) w##n #endif +#ifdef __CHERI_PURE_CAPABILITY__ + +dumpregs: +myfunc: + mov c16, csp + mov c17, csp + sub csp, csp, 544 // 512 for registers and 32 for old csp and lr + + stp c8, c9, [c17, #-16]! // 480 + stp c6, c7, [c17, #-16]! // 448 + stp c4, c5, [c17, #-16]! // 416 + stp c2, c3, [c17, #-16]! // 384 + stp c0, c1, [c17, #-16]! // 352 + + sub c17, c17, 8 + st4 { v4.h, v5.h, v6.h, v7.h }[0], [c17] //344 + sub c17, c17, 8 + st4 { v0.h, v1.h, v2.h, v3.h }[0], [c17] //336 + + stp x8, x9, [c17, #-16]! //320 + + stp q6, q7, [c17, #-32]! //288 + stp q4, q5, [c17, #-32]! //256 + stp q2, q3, [c17, #-32]! //224 + stp q0, q1, [c17, #-32]! //192 + + stp x6, x7, [c17, #-16]! //176 + stp x4, x5, [c17, #-16]! //160 + stp x2, x3, [c17, #-16]! //144 + stp x0, x1, [c17, #-16]! //128 + + stp w6, w7, [c17, #-8]! //120 + stp w4, w5, [c17, #-8]! //112 + stp w2, w3, [c17, #-8]! //104 + stp w0, w1, [c17, #-8]! // 96 + + stp s6, s7, [c17, #-8]! // 88 + stp s4, s5, [c17, #-8]! // 80 + stp s2, s3, [c17, #-8]! // 72 + stp s0, s1, [c17, #-8]! // 64 + + stp d6, d7, [c17, #-16]! // 48 + stp d4, d5, [c17, #-16]! // 32 + stp d2, d3, [c17, #-16]! // 16 + stp d0, d1, [c17, #-16]! // 0 + + add c0, csp, #16 + stp c16, c30, [c17, #-16]! + + adrp c9, which_kind_of_test // determine the type of test + add c9, c9, :lo12:which_kind_of_test + ldr w9, [c9, #0] + cmp w9, #1 + bgt LABEL_TEST_FUNC_RETURN + bl testfunc // parameter passing test or va_arg code gen test + b LABEL_RET +LABEL_TEST_FUNC_RETURN: + adrp c9, testfunc_ptr + add c9, c9, :lo12:testfunc_ptr + ldr c9, [c9, #0] + blr c9 // function return value test + adrp c9, saved_return_address + add c9, c9, :lo12:saved_return_address + ldr c9, [c9, #0] + str c9, [csp, #8] // Update the copy of LR reg saved on stack +LABEL_RET: + ldp c0, c30, [csp] + mov csp, c0 + ret + +.weak testfunc +.weak testfunc_ptr +.weak saved_return_address + +#else + dumpregs: myfunc: mov x16, sp @@ -74,3 +150,4 @@ LABEL_RET: .weak testfunc .weak testfunc_ptr .weak saved_return_address +#endif