From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1816) id AD2553858408; Tue, 28 Sep 2021 15:15:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AD2553858408 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kyrylo Tkachov To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-3929] aarch64: Add command-line support for Armv8.7-a X-Act-Checkin: gcc X-Git-Author: Kyrylo Tkachov X-Git-Refname: refs/heads/master X-Git-Oldrev: 0400ca17f361dcc7f8230bb69a25de22497c73c3 X-Git-Newrev: e159c0aa10e50c292a534535c73f38d22b6129a8 Message-Id: <20210928151500.AD2553858408@sourceware.org> Date: Tue, 28 Sep 2021 15:15:00 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Sep 2021 15:15:00 -0000 https://gcc.gnu.org/g:e159c0aa10e50c292a534535c73f38d22b6129a8 commit r12-3929-ge159c0aa10e50c292a534535c73f38d22b6129a8 Author: Kyrylo Tkachov Date: Tue Sep 28 16:13:26 2021 +0100 aarch64: Add command-line support for Armv8.7-a This patch adds support for -march=armv8.7-a in GCC. It adds the +ls64 extension that's included in this architecture revision. Currently this is just the command-line option and +ls64 allows the relevant instructions to be used in inline assembly. The ACLE defines some intrinsics for them but those can be added separately later (together with the appropriate __ARM_FEATURE_* predefine). 2021-09-28 Kyrylo Tkachov * config/aarch64/aarch64.h (AARCH64_FL_LS64): Define (AARCH64_FL_V8_7): Likewise. (AARCH64_FL_FOR_ARCH8_7): Likewise. * config/aarch64/aarch64-arches.def (armv8.7-a): Define. * config/aarch64/aarch64-option-extensions.def (ls64): Define. * doc/invoke.texi: Document the above. Diff: --- gcc/config/aarch64/aarch64-arches.def | 1 + gcc/config/aarch64/aarch64-option-extensions.def | 3 +++ gcc/config/aarch64/aarch64.h | 9 +++++++++ gcc/doc/invoke.texi | 4 ++++ 4 files changed, 17 insertions(+) diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def index b7497277bb8..91410e36fae 100644 --- a/gcc/config/aarch64/aarch64-arches.def +++ b/gcc/config/aarch64/aarch64-arches.def @@ -37,6 +37,7 @@ AARCH64_ARCH("armv8.3-a", generic, 8_3A, 8, AARCH64_FL_FOR_ARCH8_3) AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4) AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5) AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6) +AARCH64_ARCH("armv8.7-a", generic, 8_7A, 8, AARCH64_FL_FOR_ARCH8_7) AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R) #undef AARCH64_ARCH diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index 579328c48df..b61f1df9019 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -232,4 +232,7 @@ AARCH64_OPT_EXTENSION("flagm", AARCH64_FL_FLAGM, 0, 0, false, "flagm") /* Enabling/Disabling "pauth" only changes "pauth". */ AARCH64_OPT_EXTENSION("pauth", AARCH64_FL_PAUTH, 0, 0, false, "paca pacg") +/* Enabling/Disabling "ls64" only changes "ls64". */ +AARCH64_OPT_EXTENSION("ls64", AARCH64_FL_LS64, 0, 0, false, "") + #undef AARCH64_OPT_EXTENSION diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index a5ba6c24037..0c172c7bf6c 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -231,6 +231,12 @@ extern unsigned aarch64_architecture_version; /* Pointer Authentication (PAUTH) extension. */ #define AARCH64_FL_PAUTH (1ULL << 40) +/* 64-byte atomic load/store extensions. */ +#define AARCH64_FL_LS64 (1ULL << 41) + +/* Armv8.7-a architecture extensions. */ +#define AARCH64_FL_V8_7 (1ULL << 42) + /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) @@ -255,6 +261,9 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_FOR_ARCH8_6 \ (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \ | AARCH64_FL_I8MM | AARCH64_FL_BF16) +#define AARCH64_FL_FOR_ARCH8_7 \ + (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64) + #define AARCH64_FL_FOR_ARCH8_R \ (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6d9a107acd0..5b016166972 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18570,6 +18570,7 @@ and the features that they enable by default: @item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, @samp{+fp16fml}, @samp{+dotprod} @item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres} @item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm} +@item @samp{armv8.7-a} @tab Armv8.7-a @tab @samp{armv8.6-a}, @samp{+ls64} @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r} @end multitable @@ -18856,6 +18857,9 @@ Enable brain half-precision floating-point instructions. This also enables Advanced SIMD and floating-point instructions. This option is enabled by default for @option{-march=armv8.6-a}. Use of this option with architectures prior to Armv8.2-A is not supported. +@item ls64 +Enable the 64-byte atomic load and store instructions for accelerators. +This option is enabled by default for @option{-march=armv8.7-a}. @item flagm Enable the Flag Manipulation instructions Extension. @item pauth