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From: Matthew Malcomson <matmal01@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/morello)] aarch64: Fix ICE on fpsr fpcr getters [PR96968] Date: Fri, 1 Oct 2021 09:16:53 +0000 (GMT) [thread overview] Message-ID: <20211001091653.D26863857C6E@sourceware.org> (raw) https://gcc.gnu.org/g:035f12ba83a93e628e1863dbc105f6877c6a86a4 commit 035f12ba83a93e628e1863dbc105f6877c6a86a4 Author: Andrea Corallo <andrea.corallo@arm.com> Date: Mon Sep 14 14:47:24 2020 +0100 aarch64: Fix ICE on fpsr fpcr getters [PR96968] Backported from f5e73de00e9 on the GCC master branch. gcc/ChangeLog 2020-09-14 Andrea Corallo <andrea.corallo@arm.com> PR target/96968 * config/aarch64/aarch64-builtins.c (aarch64_expand_fpsr_fpcr_setter): Fix comment nit. (aarch64_expand_fpsr_fpcr_getter): New function, expand these getters using expand_insn machinery. (aarch64_general_expand_builtin): Make use of. gcc/testsuite/ChangeLog 2020-09-14 Andrea Corallo <andrea.corallo@arm.com> PR target/96968 * gcc.target/aarch64/pr96968.c: New test. Diff: --- gcc/config/aarch64/aarch64-builtins.c | 30 +++++++++++++++++++++--------- gcc/testsuite/gcc.target/aarch64/pr96968.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+), 9 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 1e1a17ad003..61afc1d9630 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -2031,7 +2031,7 @@ aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target) return target; } -/* Expand an expression EXP as fpsr or cpsr setter (depending on +/* Expand an expression EXP as fpsr or fpcr setter (depending on UNSPEC) using MODE. */ static void aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp) @@ -2041,6 +2041,18 @@ aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp) emit_insn (gen_aarch64_set (unspec, mode, op)); } +/* Expand a fpsr or fpcr getter (depending on UNSPEC) using MODE. + Return the target. */ +static rtx +aarch64_expand_fpsr_fpcr_getter (enum insn_code icode, machine_mode mode, + rtx target) +{ + expand_operand op; + create_output_operand (&op, target, mode); + expand_insn (icode, 1, &op); + return op.value; +} + /* Expand an expression EXP that calls built-in function FCODE, with result going to TARGET if that's convenient. IGNORE is true if the result of the builtin is ignored. */ @@ -2055,26 +2067,26 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target, switch (fcode) { case AARCH64_BUILTIN_GET_FPCR: - emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, SImode, target)); - return target; + return aarch64_expand_fpsr_fpcr_getter (CODE_FOR_aarch64_get_fpcrsi, + SImode, target); case AARCH64_BUILTIN_SET_FPCR: aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, SImode, exp); return target; case AARCH64_BUILTIN_GET_FPSR: - emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, SImode, target)); - return target; + return aarch64_expand_fpsr_fpcr_getter (CODE_FOR_aarch64_get_fpsrsi, + SImode, target); case AARCH64_BUILTIN_SET_FPSR: aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, SImode, exp); return target; case AARCH64_BUILTIN_GET_FPCR64: - emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, DImode, target)); - return target; + return aarch64_expand_fpsr_fpcr_getter (CODE_FOR_aarch64_get_fpcrdi, + DImode, target); case AARCH64_BUILTIN_SET_FPCR64: aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, DImode, exp); return target; case AARCH64_BUILTIN_GET_FPSR64: - emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, DImode, target)); - return target; + return aarch64_expand_fpsr_fpcr_getter (CODE_FOR_aarch64_get_fpsrdi, + DImode, target); case AARCH64_BUILTIN_SET_FPSR64: aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, DImode, exp); return target; diff --git a/gcc/testsuite/gcc.target/aarch64/pr96968.c b/gcc/testsuite/gcc.target/aarch64/pr96968.c new file mode 100644 index 00000000000..21ffd955153 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr96968.c @@ -0,0 +1,28 @@ +/* { dg-options "-O1" } */ + +void +fpsr_getter (void) +{ + unsigned int fpsr = __builtin_aarch64_get_fpsr (); +} + +void +fpsr64_getter (void) +{ + unsigned long fpsr = __builtin_aarch64_get_fpsr64 (); +} + +void +fpcr_getter (void) +{ + unsigned int fpcr = __builtin_aarch64_get_fpcr (); +} + +void +fpcr64_getter (void) +{ + unsigned long fpcr = __builtin_aarch64_get_fpcr64 (); +} + +/* { dg-final { scan-assembler-times {\tmrs\tx0, fpsr\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tmrs\tx0, fpcr\n} 2 } } */
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