From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id A8D433858415; Tue, 5 Oct 2021 23:36:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A8D433858415 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work070)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work070 X-Git-Oldrev: 54e299dcc7d77817fb23f041f7e27a02d9ccc945 X-Git-Newrev: 1e091463d0491b650685d8a972cd25b16567dd62 Message-Id: <20211005233648.A8D433858415@sourceware.org> Date: Tue, 5 Oct 2021 23:36:48 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Oct 2021 23:36:48 -0000 https://gcc.gnu.org/g:1e091463d0491b650685d8a972cd25b16567dd62 commit 1e091463d0491b650685d8a972cd25b16567dd62 Author: Michael Meissner Date: Tue Oct 5 19:36:23 2021 -0400 Update ChangeLog.meissner. gcc/ 2021-10-05 Michael Meissner * ChangeLog.meissner: Update. gcc/testsuite/ 2021-10-05 Michael Meissner * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 120 +++++++++++++++++++++++++++++++++++++++ gcc/testsuite/ChangeLog.meissner | 32 +++++++++++ 2 files changed, 152 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 50e93527c6e..38264351165 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,123 @@ +work070.patch014: +2021-10-05 Michael Meissner + + * config/rs6000/constraint.md (eD): New constraint. + * config/rs6000/predicates.md (easy_fp_constant): If the constant + can be loaded with XXSPLTI32DX, it is easy. + (easy_vector_constant_2insns): New predicate. + (easy_vector_constant): If the constant can be loaded with + XXSPLTI32DX, it is easy. + * config/rs6000/rs6000-protos.h (xxsplti32dx_constant_immediate): + New declaration. + * config/rs6000/rs6000.c (xxsplti32dx_constant_immediate): New + helper function. + (output_vec_const_move): If the operand can be loaded with + XXSPLTI32DX, split it. + (rs6000_output_move_128bit): Likewise. + (prefixed_xxsplti_p): Constants loaded with XXSPLTI32DX are + prefixed. + * config/rs6000/rs6000.md (movsf_hardfloat): Add support for + constants loaded with XXSPLTI32DX. + (mov_hardfloat32, FMOVE64 iterator): Likewise. + (mov_hardfloat64, FMOVE64 iterator): Likewise. + (movdi_internal32): Likewise. + (movdi_internal64): Likewise. + * config/rs6000/rs6000.opt (-mxxsplti32dx): New option. + * config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX_CONST): New unspec. + (vsx_mov_64bit): Add support for constants loaded with + XXSPLTI32DX. + (vsx_mov_32bit): Likewise. + (XXSPLTI32DX): New mode iterator. + (splitter for XXSPLTI32DX): Add splitter for constants loaded with + XXSPLTI32DX. + (xxsplti32dx__first): New insns. + (xxsplti32dx__second): New insns. + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document the + eD constraint. + +work070.patch013: +2021-10-05 Michael Meissner + + * config/rs6000/constraints.md (eW): New constraint. + * config/rs6000/predicates.md (easy_vector_constant_splat_word): + New predicate. + (easy_vector_constant): If we can use XXSPLTIW, the vector + constant is easy. + * config/rs6000/rs6000-protos.h (xxspltiw_constant_immediate): New + declaration. + * config/rs6000/rs6000.c (xxspltib_constant_p): Don't return true + if we could generate XXSPLTIW instead of XXSPLTIB and sign + extend. + (xxspltiw_constant_immediate): New function. + (output_vec_const_move): Add support for loading up vector + constants with XXSPLTIW. + (prefixed_xxsplti_p): Recognize xxspltiw instructions as + prefixed. + * config/rs6000/rs6000.opt (-mxxspltiw): New debug switch. + * config/rs6000/vsx.md (vsx_mov_64bit): Add support for + constants loaded with XXSPLTIW. + (vsx_mov_32bit): Likewise. + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document the + eW constraint. + +work070.patch012: +2021-10-05 Michael Meissner + + * config/rs6000/constraints.md (eQ): New constraint. + * config/rs6000/predicates.md (easy_fp_constant): If we can use + LXVKQ, it is an easy floating point constant. + (easy_fp_constant_ieee128): New predicate. + * config/rs6000/rs6000-protos.h (xxspltidp_constant_immediate): + New declaration. + * config/rs6000/rs6000.c (xxspltidp_constant_immediate): New + function. + (output_vec_const_move): Add support for LXVKQ. + (rs6000_output_move_128bit): Likewise. + * config/rs6000/rs6000.opt (-mlxvkq): New debug option. + * config/rs6000/vsx.md (vsx_mov_64bit): Add support for + LXVKQ. + (vsx_mov_32bit): Likewise. + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document the + eQ constraint. + +work070.patch011: +2021-10-05 Michael Meissner + + * config/rs6000/constraints.md (eF): New constraint. + (eV): New constraint. + * config/rs6000/predicates.md (easy_fp_constant): If we can load + the scalar constant with XXSPLTIDP, the constant is easy. + (easy_fp_constant_64bit_scalar): New predicate. + (easy_vector_constant_64bit_element): New predicate. + (easy_vector_constant): If we can generate XXSPLTIDP, mark the + vector constant as easy. + * config/rs6000/rs6000-protos.h (xxspltidp_constant_immediate): New + declaration. + (prefixed_xxsplti_p): Likewise. + * config/rs6000/rs6000.c (xxspltidp_constant_immediate): New function. + (output_vec_const_move): Add support for XXSPLTIDP. + (prefixed_xxsplti_p): New function. + * config/rs6000/rs6000.md (prefixed attribute): Add support for the + xxsplti* prefixed instructions. + (movsf_hardfloat): Add XXSPLTIDP support. + (mov_hardfloat32, FMOVE64 iterator): Likewise. + (mov_hardfloat64, FMOVE64 iterator): Likewise. + (movdi_internal32): Likewise. + (movdi_internal64): Likewise. + * config/rs6000/rs6000.opt (-mxxspltidp): New switch. + * config/rs6000/vsx.md (vsx_move_64bit): Add XXSPLTIDP + support. + (vsx_move_32bit): Likewise. + (XXSPLTIDP_S): New mode iterator. + (XXSPLTIDP_V): Likewise. + (XXSPLTIDP): Likewise. + (xxspltidp__inst): Replace xxspltidp_v2df_inst with an + iterated form that also does SFmode, DFmode, DImode, and + V2DImode. + (xxspltidp__internal): New insn and splits. + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document the + eF and eV constraints. + 2021-10-04 Michael Meissner Clone branch diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner index 50e93527c6e..39e2dc561c8 100644 --- a/gcc/testsuite/ChangeLog.meissner +++ b/gcc/testsuite/ChangeLog.meissner @@ -1,3 +1,35 @@ +work070.patch014: +2021-10-05 Michael Meissner + + * gcc.target/powerpc/vec-splat-constant-df-2.c: New test. + * gcc.target/powerpc/vec-splat-constant-di-2.c: New test. + * gcc.target/powerpc/vec-splat-constant-v2df-2.c: New test. + * gcc.target/powerpc/vec-splat-constant-v2di-2.c: New test. + +work070.patch013: +2021-10-05 Michael Meissner + + * gcc.target/powerpc/vec-splat-constant-v16qi.c: New test. + * gcc.target/powerpc/vec-splat-constant-v4sf.c: New test. + * gcc.target/powerpc/vec-splat-constant-v4si.c: New test. + * gcc.target/powerpc/vec-splat-constant-v8hi.c: New test. + +work070.patch012: +2021-10-05 Michael Meissner + + * gcc.target/powerpc/float128-constant.c: New test. + +work070.patch011: +2021-10-05 Michael Meissner + + * gcc.target/powerpc/pr86731-fwrapv-longlong.c: Update insn + regex for power10. + * gcc.target/powerpc/vec-splat-constant-df.c: New test. + * gcc.target/powerpc/vec-splat-constant-di.c: New test. + * gcc.target/powerpc/vec-splat-constant-sf.c: New test. + * gcc.target/powerpc/vec-splat-constant-v2df.c: New test. + * gcc.target/powerpc/vec-splat-constant-v2di.c: New test. + 2021-10-04 Michael Meissner Clone branch