From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2100) id 80C55385803C; Mon, 11 Oct 2021 20:50:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 80C55385803C Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Giuliano Belinassi To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/giulianob/heads/pfe_backport)] Backport [AArch64] PR92424: Fix -fpatchable-function-entry=N, M with BTI X-Act-Checkin: gcc X-Git-Author: Szabolcs Nagy X-Git-Refname: refs/users/giulianob/heads/pfe_backport X-Git-Oldrev: 2435fb01446d4516896cb70946980138efa38d1d X-Git-Newrev: eeeffb9178990c78b9b42bae909581b2108e29a4 Message-Id: <20211011205002.80C55385803C@sourceware.org> Date: Mon, 11 Oct 2021 20:50:02 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Oct 2021 20:50:02 -0000 https://gcc.gnu.org/g:eeeffb9178990c78b9b42bae909581b2108e29a4 commit eeeffb9178990c78b9b42bae909581b2108e29a4 Author: Szabolcs Nagy Date: Wed Jan 15 12:23:40 2020 +0000 Backport [AArch64] PR92424: Fix -fpatchable-function-entry=N,M with BTI This is a workaround that emits a BTI after the function label if that is followed by a patch area. We try to remove the BTI that follows the patch area (this may fail e.g. if the first instruction is a PACIASP). So before this commit -fpatchable-function-entry=3,1 with bti generates .section __patchable_function_entries .8byte .LPFE .text .LPFE: nop foo: nop nop bti c // or paciasp ... and after this commit .section __patchable_function_entries .8byte .LPFE .text .LPFE: nop foo: bti c nop nop // may be paciasp ... and with -fpatchable-function-entry=1 (M=0) the code now is foo: bti c .section __patchable_function_entries .8byte .LPFE .text .LPFE: nop // may be paciasp ... There is a new bti insn in the middle of the patchable area users need to be aware of unless M=0 (patch area is after the new bti) or M=N (patch area is before the label, no new bti). Note: bti is not added to all functions consistently (it can be turned off per function using a target attribute or the compiler may detect that the function is never called indirectly), so if bti is inserted in the middle of a patch area then user code needs to deal with detecting it. Tested on aarch64-none-linux-gnu. gcc/ChangeLog: PR target/92424 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set cfun->machine->label_is_assembled. (aarch64_print_patchable_function_entry): New. (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define. * config/aarch64/aarch64.h (struct machine_function): New field, label_is_assembled. gcc/testsuite/ChangeLog: PR target/92424 * gcc.target/aarch64/pr92424-1.c: New test. * gcc.target/aarch64/pr92424-2.c: New test. * gcc.target/aarch64/pr92424-3.c: New test. Diff: --- gcc/ChangeLog | 13 +++ gcc/config/aarch64/aarch64.c | 31 +++++++ gcc/config/aarch64/aarch64.h | 1 + gcc/testsuite/ChangeLog | 10 +++ gcc/testsuite/gcc.target/aarch64/pr92424-1.c | 122 +++++++++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/pr92424-2.c | 12 +++ gcc/testsuite/gcc.target/aarch64/pr92424-3.c | 12 +++ 7 files changed, 201 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 65fed165f1a..0df1da72b48 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2021-10-07 Giuliano Belinassi + + Backport from mainline + 2020-01-21 Szabolcs Nagy + + PR target/92424 + * config/aarch64/aarch64.c (aarch64_declare_function_name): Set + cfun->machine->label_is_assembled. + (aarch64_print_patchable_function_entry): New. + (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define. + * config/aarch64/aarch64.h (struct machine_function): New field, + label_is_assembled. + 2021-10-07 Giuliano Belinassi Backport from mainline diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 4e94be3b0b4..744b436a54d 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -11753,6 +11753,34 @@ aarch64_declare_function_name (FILE *stream, const char* name, /* Don't forget the type directive for ELF. */ ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "function"); ASM_OUTPUT_LABEL (stream, name); + + cfun->machine->label_is_assembled = true; +} + +/* Implement PRINT_PATCHABLE_FUNCTION_ENTRY. Check if the patch area is after + the function label and emit a BTI if necessary. */ + +void +aarch64_print_patchable_function_entry (FILE *file, + unsigned HOST_WIDE_INT patch_area_size, + bool record_p) +{ + if (cfun->machine->label_is_assembled + && aarch64_bti_enabled () + && !cgraph_node::get (cfun->decl)->only_called_directly_p ()) + { + /* Remove the BTI that follows the patch area and insert a new BTI + before the patch area right after the function label. */ + rtx_insn *insn = next_real_nondebug_insn (get_insns ()); + if (insn + && INSN_P (insn) + && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE + && XINT (PATTERN (insn), 1) == UNSPECV_BTI_C) + delete_insn (insn); + asm_fprintf (file, "\thint\t34 // bti c\n"); + } + + default_print_patchable_function_entry (file, patch_area_size, record_p); } /* Implements TARGET_ASM_FILE_START. Output the assembly header. */ @@ -14779,6 +14807,9 @@ aarch64_run_selftests (void) #undef TARGET_ASM_TRAMPOLINE_TEMPLATE #define TARGET_ASM_TRAMPOLINE_TEMPLATE aarch64_asm_trampoline_template +#undef TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY +#define TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY aarch64_print_patchable_function_entry + #undef TARGET_BUILD_BUILTIN_VA_LIST #define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index ddf833ebfe8..8cac2da1070 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -601,6 +601,7 @@ typedef struct GTY (()) machine_function struct aarch64_frame frame; /* One entry for each hard register. */ bool reg_is_wrapped_separately[LAST_SAVED_REGNUM]; + bool label_is_assembled; } machine_function; #endif diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e5ffe726153..f3153a94482 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2021-10-07 Giuliano Belinassi + + Backport from mainline + 2020-01-21 Szabolcs Nagy + + PR target/92424 + * gcc.target/aarch64/pr92424-1.c: New test. + * gcc.target/aarch64/pr92424-2.c: New test. + * gcc.target/aarch64/pr92424-3.c: New test. + 2021-10-07 Giuliano Belinassi Backport from mainline diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-1.c b/gcc/testsuite/gcc.target/aarch64/pr92424-1.c new file mode 100644 index 00000000000..c413a2c306e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr92424-1.c @@ -0,0 +1,122 @@ +/* { dg-do "compile" } */ +/* { dg-options "-O1" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +/* Note: this test only checks the instructions in the function bodies, + not the placement of the patch label or nops before the futncion. */ + +/* +**f10_none: +** nop +** ret +*/ +void +__attribute__ ((target("branch-protection=none"), + patchable_function_entry (1, 0))) +f10_none () +{ +} + +/* +**f10_pac: +** hint 34 // bti c +** nop +** hint 25 // paciasp +** hint 29 // autiasp +** ret +*/ +void +__attribute__ ((target("branch-protection=bti+pac-ret+leaf"), + patchable_function_entry (1, 0))) +f10_pac () +{ +} + +/* +**f10_bti: +** hint 34 // bti c +** nop +** ret +*/ +void +__attribute__ ((target("branch-protection=bti"), + patchable_function_entry (1, 0))) +f10_bti () +{ +} + +/* +**f11_none: +** ret +*/ +void +__attribute__ ((target("branch-protection=none"), + patchable_function_entry (1, 1))) +f11_none () +{ +} + +/* +**f11_pac: +** hint 25 // paciasp +** hint 29 // autiasp +** ret +*/ +void +__attribute__ ((target("branch-protection=bti+pac-ret+leaf"), + patchable_function_entry (1, 1))) +f11_pac () +{ +} + +/* +**f11_bti: +** hint 34 // bti c +** ret +*/ +void +__attribute__ ((target("branch-protection=bti"), + patchable_function_entry (1, 1))) +f11_bti () +{ +} + +/* +**f21_none: +** nop +** ret +*/ +void +__attribute__ ((target("branch-protection=none"), + patchable_function_entry (2, 1))) +f21_none () +{ +} + +/* +**f21_pac: +** hint 34 // bti c +** nop +** hint 25 // paciasp +** hint 29 // autiasp +** ret +*/ +void +__attribute__ ((target("branch-protection=bti+pac-ret+leaf"), + patchable_function_entry (2, 1))) +f21_pac () +{ +} + +/* +**f21_bti: +** hint 34 // bti c +** nop +** ret +*/ +void +__attribute__ ((target("branch-protection=bti"), + patchable_function_entry (2, 1))) +f21_bti () +{ +} diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-2.c b/gcc/testsuite/gcc.target/aarch64/pr92424-2.c new file mode 100644 index 00000000000..0e75657a153 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr92424-2.c @@ -0,0 +1,12 @@ +/* { dg-do "compile" } */ +/* { dg-options "-O1" } */ + +/* Test the placement of the .LPFE1 label. */ + +void +__attribute__ ((target("branch-protection=bti"), + patchable_function_entry (1, 0))) +f10_bti () +{ +} +/* { dg-final { scan-assembler "f10_bti:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\tret\n" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/pr92424-3.c b/gcc/testsuite/gcc.target/aarch64/pr92424-3.c new file mode 100644 index 00000000000..0a1f74d4096 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr92424-3.c @@ -0,0 +1,12 @@ +/* { dg-do "compile" } */ +/* { dg-options "-O1" } */ + +/* Test the placement of the .LPFE1 label. */ + +void +__attribute__ ((target("branch-protection=bti+pac-ret+leaf"), + patchable_function_entry (1, 0))) +f10_pac () +{ +} +/* { dg-final { scan-assembler "f10_pac:\n\thint\t34 // bti c\n.*\.LPFE1:\n\tnop\n.*\thint\t25 // paciasp\n.*\thint\t29 // autiasp\n.*\tret\n" } } */