From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2100) id CB269385802E; Thu, 14 Oct 2021 13:01:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CB269385802E Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Giuliano Belinassi To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/giulianob/heads/pfe_backport_dirty)] Backport Add GFNI command line options and macros X-Act-Checkin: gcc X-Git-Author: Julia Koval X-Git-Refname: refs/users/giulianob/heads/pfe_backport_dirty X-Git-Oldrev: 35326cf88ca29fae05862a92a12e41c5ac0b1d2d X-Git-Newrev: 261338621accafa00aa526bfa31b16a9f1b3be76 Message-Id: <20211014130120.CB269385802E@sourceware.org> Date: Thu, 14 Oct 2021 13:01:20 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Oct 2021 13:01:20 -0000 https://gcc.gnu.org/g:261338621accafa00aa526bfa31b16a9f1b3be76 commit 261338621accafa00aa526bfa31b16a9f1b3be76 Author: Julia Koval Date: Fri Oct 20 08:31:33 2017 +0200 Backport Add GFNI command line options and macros gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET, (OPTION_MASK_ISA_GFNI_UNSET): New. (ix86_handle_option): Handle OPT_mgfni. * config/i386/cpuid.h (bit_GFNI): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni. * config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__. * config/i386/i386.c (ix86_target_string): Add -mgfni. (ix86_valid_target_attribute_inner_p): Add OPT_mgfni. * config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New. * config/i386/i386.opt: Add mgfni. Diff: --- gcc/ChangeLog | 21 ++++++++++++++++++--- gcc/common/config/i386/i386-common.c | 15 +++++++++++++++ gcc/config/i386/cpuid.h | 1 + gcc/config/i386/driver-i386.c | 5 ++++- gcc/config/i386/i386-c.c | 2 ++ gcc/config/i386/i386.c | 2 ++ gcc/config/i386/i386.h | 2 ++ gcc/config/i386/i386.opt | 4 ++++ 8 files changed, 48 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 951e9985417..867b231c434 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2021-10-13 Giuliano Belinassi + + Backport from mainline + 2017-10-20 Julia Koval + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET, + (OPTION_MASK_ISA_GFNI_UNSET): New. + (ix86_handle_option): Handle OPT_mgfni. + * config/i386/cpuid.h (bit_GFNI): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect gfni. + * config/i386/i386-c.c (ix86_target_macros_internal): Define __GFNI__. + * config/i386/i386.c (ix86_target_string): Add -mgfni. + (ix86_valid_target_attribute_inner_p): Add OPT_mgfni. + * config/i386/i386.h (TARGET_GFNI, TARGET_GFNI_P): New. + * config/i386/i386.opt: Add mgfni. + 2021-10-13 Giuliano Belinassi Backport from mainline @@ -26,9 +42,11 @@ * reg-notes.def: Add REG_NOTE (CALL_NOCF_CHECK). * toplev.c (process_options): Add flag_cf_protection handling. + 2021-10-13 Giuliano Belinassi Backport from mainline + 2017-05-03 Nathan Sidwell Canonicalize canonical type hashing @@ -8364,8 +8382,6 @@ (aarch64_gimplify_va_arg_expr): Adjust aarch64_function_arg_alignment caller. -<<<<<<< HEAD -======= 2017-04-26 Nathan Sidwell * tree.h (crc32_unsigned_n): Declare. @@ -8426,7 +8442,6 @@ ashrv2di3 insn using VI248_AVX512BW_1 mode iterator. ->>>>>>> 6fe63fb43f5 (Canonicalize canonical type hashing) 2017-04-25 Martin Sebor PR tree-optimization/80497 diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 4185176495a..34edcb895fe 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -137,6 +137,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_CLZERO_SET OPTION_MASK_ISA_CLZERO #define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU #define OPTION_MASK_ISA_RDPID_SET OPTION_MASK_ISA_RDPID +#define OPTION_MASK_ISA_GFNI_SET OPTION_MASK_ISA_GFNI /* Define a set of ISAs which aren't available when a given ISA is disabled. MMX and SSE ISAs are handled separately. */ @@ -202,6 +203,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_CLZERO_UNSET OPTION_MASK_ISA_CLZERO #define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU #define OPTION_MASK_ISA_RDPID_UNSET OPTION_MASK_ISA_RDPID +#define OPTION_MASK_ISA_GFNI_UNSET OPTION_MASK_ISA_GFNI /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -484,6 +486,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mgfni: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_GFNI_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_GFNI_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_GFNI_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_GFNI_UNSET; + } + return true; + case OPT_mavx5124fmaps: if (value) { diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index df90089a96f..61ee017003c 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -97,6 +97,7 @@ #define bit_AVX512VBMI (1 << 1) #define bit_PKU (1 << 3) #define bit_OSPKE (1 << 4) +#define bit_GFNI (1 << 8) #define bit_AVX512VPOPCNTDQ (1 << 14) #define bit_RDPID (1 << 22) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 6c812514239..63ab12f3487 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -415,6 +415,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0; unsigned int has_mwaitx = 0, has_clzero = 0, has_pku = 0, has_rdpid = 0; unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0; + unsigned int has_gfni = 0; bool arch; @@ -504,6 +505,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) has_avx512vbmi = ecx & bit_AVX512VBMI; has_pku = ecx & bit_OSPKE; has_rdpid = ecx & bit_RDPID; + has_gfni = ecx & bit_GFNI; has_avx5124vnniw = edx & bit_AVX5124VNNIW; has_avx5124fmaps = edx & bit_AVX5124FMAPS; @@ -1035,6 +1037,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) const char *clzero = has_clzero ? " -mclzero" : " -mno-clzero"; const char *pku = has_pku ? " -mpku" : " -mno-pku"; const char *rdpid = has_rdpid ? " -mrdpid" : " -mno-rdpid"; + const char *gfni = has_gfni ? " -mgfni" : " -mno-gfni"; options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3, sse4a, cx16, sahf, movbe, aes, sha, pclmul, popcnt, abm, lwp, fma, fma4, xop, bmi, sgx, bmi2, @@ -1044,7 +1047,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) avx512cd, avx512pf, prefetchwt1, clflushopt, xsavec, xsaves, avx512dq, avx512bw, avx512vl, avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw, - clwb, mwaitx, clzero, pku, rdpid, NULL); + clwb, mwaitx, clzero, pku, rdpid, gfni, NULL); } done: diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index 9a79a215bec..8118599b109 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -450,6 +450,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__PKU__"); if (isa_flag2 & OPTION_MASK_ISA_RDPID) def_or_undef (parse_in, "__RDPID__"); + if (isa_flag2 & OPTION_MASK_ISA_GFNI) + def_or_undef (parse_in, "__GFNI__"); if (TARGET_IAMCU) { def_or_undef (parse_in, "__iamcu"); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index de71f56be6b..d0308c51e14 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4250,6 +4250,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2, ISAs come first. Target string will be displayed in the same order. */ static struct ix86_target_opts isa2_opts[] = { + { "-mgfni", OPTION_MASK_ISA_GFNI }, { "-mrdpid", OPTION_MASK_ISA_RDPID }, { "-msgx", OPTION_MASK_ISA_SGX }, { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW }, @@ -6693,6 +6694,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[], IX86_ATTR_ISA ("mpx", OPT_mmpx), IX86_ATTR_ISA ("clwb", OPT_mclwb), IX86_ATTR_ISA ("rdpid", OPT_mrdpid), + IX86_ATTR_ISA ("gfni", OPT_mgfni), /* enum options */ IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_), diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 8e31c30787d..d4b14195d92 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -104,6 +104,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_SGX_P(x) TARGET_ISA_SGX_P(x) #define TARGET_RDPID TARGET_ISA_RDPID #define TARGET_RDPID_P(x) TARGET_ISA_RDPID_P(x) +#define TARGET_GFNI TARGET_ISA_GFNI +#define TARGET_GFNI_P(x) TARGET_ISA_GFNI_P(x) #define TARGET_BMI TARGET_ISA_BMI #define TARGET_BMI_P(x) TARGET_ISA_BMI_P(x) #define TARGET_BMI2 TARGET_ISA_BMI2 diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index b90da9f89ec..cdb156e4825 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -745,6 +745,10 @@ mrdpid Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save Support RDPID built-in functions and code generation. +mgfni +Target Report Mask(ISA_GFNI) Var(ix86_isa_flags2) Save +Support GFNI built-in functions and code generation. + mbmi Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save Support BMI built-in functions and code generation.