From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7861) id D663E3858412; Fri, 15 Oct 2021 05:34:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D663E3858412 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Hongyu Wang To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-4427] AVX512FP16: Fix ICE for 2 v4hf vector concat X-Act-Checkin: gcc X-Git-Author: Hongyu Wang X-Git-Refname: refs/heads/master X-Git-Oldrev: f7571527a44808cd7062c77bb9570c13f4f6a126 X-Git-Newrev: 575191b976a5175be6579590b05f1f1d3550cefc Message-Id: <20211015053411.D663E3858412@sourceware.org> Date: Fri, 15 Oct 2021 05:34:11 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Oct 2021 05:34:12 -0000 https://gcc.gnu.org/g:575191b976a5175be6579590b05f1f1d3550cefc commit r12-4427-g575191b976a5175be6579590b05f1f1d3550cefc Author: Hongyu Wang Date: Fri Oct 15 10:58:16 2021 +0800 AVX512FP16: Fix ICE for 2 v4hf vector concat For V4HFmode, doing vector concat like __builtin_shufflevector (a, b, {0, 1, 2, 3, 4, 5, 6, 7}) could trigger ICE since it is not handled in ix86_vector_init (). Handle HFmode like HImode to avoid such ICE. gcc/ChangeLog: * config/i386/i386-expand.c (ix86_expand_vector_init): For half_vector concat for HFmode, handle them like HImode. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-v4hf-concat.c: New test. Diff: --- gcc/config/i386/i386-expand.c | 3 ++- gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 95274201f4f..1b011047251 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -15122,7 +15122,8 @@ ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals) rtx ops[2] = { XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1) }; if (inner_mode == QImode || inner_mode == HImode - || inner_mode == TImode) + || inner_mode == TImode + || inner_mode == HFmode) { unsigned int n_bits = n_elts * GET_MODE_SIZE (inner_mode); scalar_mode elt_mode = inner_mode == TImode ? DImode : SImode; diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c b/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c new file mode 100644 index 00000000000..3b8a7f39b85 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-v4hf-concat.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times "vpunpcklqdq" 1 } } */ + +typedef _Float16 v8hf __attribute__((vector_size (16))); +typedef _Float16 v4hf __attribute__((vector_size (8))); + +v8hf foov (v4hf a, v4hf b) +{ + return __builtin_shufflevector (a, b, 0, 1, 2, 3, 4, 5, 6, 7); +} + +v8hf foov2 (v4hf a) +{ + return __builtin_shufflevector (a, (v4hf){0}, 0, 1, 2, 3, 4, 5, 6, 7); +}